From: Qi Zhang <qi.z.zhang@intel.com>
To: qiming.yang@intel.com
Cc: dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,
Chinh T Cao <chinh.t.cao@intel.com>
Subject: [dpdk-dev] [PATCH v3 14/21] net/ice/base: recognize 860 as iSCSI port in CEE mode
Date: Wed, 28 Oct 2020 11:23:13 +0800 [thread overview]
Message-ID: <20201028032320.1755208-15-qi.z.zhang@intel.com> (raw)
In-Reply-To: <20201028032320.1755208-1-qi.z.zhang@intel.com>
iSCSI can use both TCP ports 860 and 3260. However, in our current
implementation, the ice_aqc_opc_get_cee_dcb_cfg (0x0A07) AQ command
doesn't provide a way to communicate the protocol port number to the
AQ's caller. Thus, we assume that 3260 is the iSCSI port number at the
AQ's caller layer.
In this patch, we will rely on the dcbx-willing mode, desired QOS and
remote QOS configuration to determine which port number that iSCSI will
use.
Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_dcb.c | 38 +++++++++++++++++++++++++--------
drivers/net/ice/base/ice_type.h | 35 +++++++++++++++++++-----------
2 files changed, 51 insertions(+), 22 deletions(-)
diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c
index f5f375a7a5..351038528b 100644
--- a/drivers/net/ice/base/ice_dcb.c
+++ b/drivers/net/ice/base/ice_dcb.c
@@ -738,22 +738,27 @@ ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
/**
* ice_cee_to_dcb_cfg
* @cee_cfg: pointer to CEE configuration struct
- * @dcbcfg: DCB configuration struct
+ * @pi: port information structure
*
* Convert CEE configuration from firmware to DCB configuration
*/
static void
ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg,
- struct ice_dcbx_cfg *dcbcfg)
+ struct ice_port_info *pi)
{
u32 status, tlv_status = LE32_TO_CPU(cee_cfg->tlv_status);
u32 ice_aqc_cee_status_mask, ice_aqc_cee_status_shift;
+ u8 i, j, err, sync, oper, app_index, ice_app_sel_type;
u16 app_prio = LE16_TO_CPU(cee_cfg->oper_app_prio);
- u8 i, err, sync, oper, app_index, ice_app_sel_type;
u16 ice_aqc_cee_app_mask, ice_aqc_cee_app_shift;
+ struct ice_dcbx_cfg *cmp_dcbcfg, *dcbcfg;
u16 ice_app_prot_id_type;
- /* CEE PG data to ETS config */
+ dcbcfg = &pi->qos_cfg.local_dcbx_cfg;
+ dcbcfg->dcbx_mode = ICE_DCBX_MODE_CEE;
+ dcbcfg->tlv_status = tlv_status;
+
+ /* CEE PG data */
dcbcfg->etscfg.maxtcs = cee_cfg->oper_num_tc;
/* Note that the FW creates the oper_prio_tc nibbles reversed
@@ -780,10 +785,16 @@ ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg,
}
}
- /* CEE PFC data to ETS config */
+ /* CEE PFC data */
dcbcfg->pfc.pfcena = cee_cfg->oper_pfc_en;
dcbcfg->pfc.pfccap = ICE_MAX_TRAFFIC_CLASS;
+ /* CEE APP TLV data */
+ if (dcbcfg->app_mode == ICE_DCBX_APPS_NON_WILLING)
+ cmp_dcbcfg = &pi->qos_cfg.desired_dcbx_cfg;
+ else
+ cmp_dcbcfg = &pi->qos_cfg.remote_dcbx_cfg;
+
app_index = 0;
for (i = 0; i < 3; i++) {
if (i == 0) {
@@ -802,6 +813,18 @@ ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg,
ice_aqc_cee_app_shift = ICE_AQC_CEE_APP_ISCSI_S;
ice_app_sel_type = ICE_APP_SEL_TCPIP;
ice_app_prot_id_type = ICE_APP_PROT_ID_ISCSI;
+
+ for (j = 0; j < cmp_dcbcfg->numapps; j++) {
+ u16 prot_id = cmp_dcbcfg->app[j].prot_id;
+ u8 sel = cmp_dcbcfg->app[j].selector;
+
+ if (sel == ICE_APP_SEL_TCPIP &&
+ (prot_id == ICE_APP_PROT_ID_ISCSI ||
+ prot_id == ICE_APP_PROT_ID_ISCSI_860)) {
+ ice_app_prot_id_type = prot_id;
+ break;
+ }
+ }
} else {
/* FIP APP */
ice_aqc_cee_status_mask = ICE_AQC_CEE_FIP_STATUS_M;
@@ -892,11 +915,8 @@ enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)
ret = ice_aq_get_cee_dcb_cfg(pi->hw, &cee_cfg, NULL);
if (ret == ICE_SUCCESS) {
/* CEE mode */
- dcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;
- dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_CEE;
- dcbx_cfg->tlv_status = LE32_TO_CPU(cee_cfg.tlv_status);
- ice_cee_to_dcb_cfg(&cee_cfg, dcbx_cfg);
ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_CEE);
+ ice_cee_to_dcb_cfg(&cee_cfg, pi);
} else if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT) {
/* CEE mode not enabled try querying IEEE data */
dcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 3d231db61a..7545235635 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -755,19 +755,28 @@ struct ice_dcb_app_priority_table {
u8 selector;
};
-#define ICE_MAX_USER_PRIORITY 8
-#define ICE_DCBX_MAX_APPS 32
-#define ICE_LLDPDU_SIZE 1500
-#define ICE_TLV_STATUS_OPER 0x1
-#define ICE_TLV_STATUS_SYNC 0x2
-#define ICE_TLV_STATUS_ERR 0x4
-#define ICE_APP_PROT_ID_FCOE 0x8906
-#define ICE_APP_PROT_ID_ISCSI 0x0cbc
-#define ICE_APP_PROT_ID_FIP 0x8914
-#define ICE_APP_SEL_ETHTYPE 0x1
-#define ICE_APP_SEL_TCPIP 0x2
-#define ICE_CEE_APP_SEL_ETHTYPE 0x0
-#define ICE_CEE_APP_SEL_TCPIP 0x1
+#define ICE_MAX_USER_PRIORITY 8
+#define ICE_DCBX_MAX_APPS 32
+#define ICE_LLDPDU_SIZE 1500
+#define ICE_TLV_STATUS_OPER 0x1
+#define ICE_TLV_STATUS_SYNC 0x2
+#define ICE_TLV_STATUS_ERR 0x4
+#ifndef ICE_APP_PROT_ID_FCOE
+#define ICE_APP_PROT_ID_FCOE 0x8906
+#endif /* ICE_APP_PROT_ID_FCOE */
+#ifndef ICE_APP_PROT_ID_ISCSI
+#define ICE_APP_PROT_ID_ISCSI 0x0cbc
+#endif /* ICE_APP_PROT_ID_ISCSI */
+#ifndef ICE_APP_PROT_ID_ISCSI_860
+#define ICE_APP_PROT_ID_ISCSI_860 0x035c
+#endif /* ICE_APP_PROT_ID_ISCSI_860 */
+#ifndef ICE_APP_PROT_ID_FIP
+#define ICE_APP_PROT_ID_FIP 0x8914
+#endif /* ICE_APP_PROT_ID_FIP */
+#define ICE_APP_SEL_ETHTYPE 0x1
+#define ICE_APP_SEL_TCPIP 0x2
+#define ICE_CEE_APP_SEL_ETHTYPE 0x0
+#define ICE_CEE_APP_SEL_TCPIP 0x1
struct ice_dcbx_cfg {
u32 numapps;
--
2.25.4
next prev parent reply other threads:[~2020-10-28 3:24 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-28 3:22 [dpdk-dev] [PATCH v3 00/21] ice: update base code Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 01/21] net/ice/base: add tunnel support for FDIR Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 02/21] net/ice/base: add NVM Write Response flags Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 03/21] net/ice/base: modify ptype bitmap for outer MAC Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 04/21] net/ice/base: rename ptype bitmap Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 05/21] net/ice/base: move sched function prototypes Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 06/21] net/ice/base: read security revision Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 07/21] net/ice/base: add functions to allocate and free a RSS global LUT Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 08/21] net/ice/base: add more capability to admin queue Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 09/21] net/ice/base: update to use package info from ice segment Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 10/21] net/ice/base: use malloc instead of calloc Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 11/21] net/ice/base: add support for class 5+ modules Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 12/21] net/ice/base: return error directly Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 13/21] net/ice/base: implement shared rate limiter Qi Zhang
2020-10-28 3:23 ` Qi Zhang [this message]
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 15/21] net/ice/base: fix parameter name in comment Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 16/21] net/ice/base: support extended GPIO access Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 17/21] net/ice/base: remove duplicated AQ command flag setting Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 18/21] net/ice/base: introduce and use FLEX_ARRAY_SIZE where possible Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 19/21] net/ice/base: refactor RSS configure API Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 20/21] net/ice/base: add support for get/set RSS LUT to specify global LUT Qi Zhang
2020-10-28 3:23 ` [dpdk-dev] [PATCH v3 21/21] net/ice/base: update version Qi Zhang
2020-10-29 8:20 ` [dpdk-dev] [PATCH v3 00/21] ice: update base code Yang, Qiming
2020-10-29 8:31 ` Zhang, Qi Z
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