From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7D84AA0521; Tue, 3 Nov 2020 15:49:38 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 65414CB93; Tue, 3 Nov 2020 15:49:37 +0100 (CET) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id A9FD5CB63 for ; Tue, 3 Nov 2020 15:49:30 +0100 (CET) IronPort-SDR: 4HNW74Atr3kAfp6jI7/kPZ5JVv4GfCs86oE6zwz/p+sHIEukUargAXSZGNl3kf3sigB5yB/SNj X3SREaLsDwpw== X-IronPort-AV: E=McAfee;i="6000,8403,9793"; a="148915917" X-IronPort-AV: E=Sophos;i="5.77,448,1596524400"; d="scan'208";a="148915917" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Nov 2020 06:49:24 -0800 IronPort-SDR: SDVRO9GtcuPIDiJCBxEfEEoyD1heCVhrGT2oXQ1dU5kh6zfmqacwvauDy9FAQrpuCf6l98EZXd EAC1qwKUU1fQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,448,1596524400"; d="scan'208";a="353351811" Received: from silpixa00399126.ir.intel.com ([10.237.222.4]) by fmsmga004.fm.intel.com with ESMTP; 03 Nov 2020 06:49:22 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: kevin.laatz@intel.com, Bruce Richardson Date: Tue, 3 Nov 2020 14:48:58 +0000 Message-Id: <20201103144858.1317742-1-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH] raw/ioat: fix queue index calculation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Coverity flags a possible problem where the 8-bit wq_idx value may have errors when shifted and sign-extended to 64-bits. Since this can only occur if the shift index is larger than any expected value from hardware, it's unlikely to cause any real problems, but we can eliminate any possible errors, and the coverity issue, by explicitly typecasting the uint8_t value to 64-bits before any shift operations occur. Coverity issue: 363695 Fixes: a33969462135 ("raw/ioat: fix work-queue config size") Signed-off-by: Bruce Richardson --- drivers/raw/ioat/idxd_pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/raw/ioat/idxd_pci.c b/drivers/raw/ioat/idxd_pci.c index 99ecfbbb4..7bc125014 100644 --- a/drivers/raw/ioat/idxd_pci.c +++ b/drivers/raw/ioat/idxd_pci.c @@ -47,7 +47,8 @@ idxd_pci_dev_command(struct idxd_rawdev *idxd, enum rte_idxd_cmds command) static uint32_t * idxd_get_wq_cfg(struct idxd_pci_common *pci, uint8_t wq_idx) { - return RTE_PTR_ADD(pci->wq_regs_base, wq_idx << (5 + pci->wq_cfg_sz)); + return RTE_PTR_ADD(pci->wq_regs_base, + (uint64_t)wq_idx << (5 + pci->wq_cfg_sz)); } static int -- 2.25.1