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From: Qi Zhang <qi.z.zhang@intel.com>
To: leyi.rong@intel.com
Cc: ferruh.yigit@intel.com, dev@dpdk.org,
	Qi Zhang <qi.z.zhang@intel.com>,
	stable@dpdk.org
Subject: [dpdk-dev] [PATCH v2] doc: fix some statements for ice vector PMD
Date: Wed, 16 Dec 2020 08:21:58 +0800
Message-ID: <20201216002158.309396-1-qi.z.zhang@intel.com> (raw)

1. Add descriptions for how to select avx512 datapath.
2. Add explanation for "P" in ice.ini.

Fixes: 7f85d5ebcfe1 ("net/ice: add AVX512 vector path")
Fixes: 271cc8c5028a ("doc: update ice features list")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---

v2:
fix statement for force-max-simd-bitwidth which is an EAL argument but
not devarg.

 doc/guides/nics/ice.rst | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst
index a0887f129f..2a4439a63a 100644
--- a/doc/guides/nics/ice.rst
+++ b/doc/guides/nics/ice.rst
@@ -211,9 +211,12 @@ are chosen based on 2 conditions.
 - ``CPU``
   On the X86 platform, the driver checks if the CPU supports AVX2.
   If it's supported, AVX2 paths will be chosen. If not, SSE is chosen.
+  If the CPU supports AVX512 and EAL argument ``force-max-simd-bitwidth``
+  is set to 512, AVX512 paths will be chosen.
 
 - ``Offload features``
-  The supported HW offload features are described in the document ice_vec.ini.
+  The supported HW offload features are described in the document ice.ini,
+  A value "P" means the offload feature is not supported by vector path.
   If any not supported features are used, ICE vector PMD is disabled and the
   normal paths are chosen.
 
-- 
2.26.2


             reply	other threads:[~2020-12-16  0:18 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-16  0:21 Qi Zhang [this message]
2020-12-17  2:13 ` Rong, Leyi
2020-12-23  9:57   ` Zhang, Qi Z
  -- strict thread matches above, loose matches on Subject: below --
2020-12-16  0:21 Qi Zhang

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