From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B9BDDA09F6; Fri, 18 Dec 2020 10:34:59 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D8861CA4C; Fri, 18 Dec 2020 10:34:41 +0100 (CET) Received: from smtpbgeu2.qq.com (smtpbgeu2.qq.com [18.194.254.142]) by dpdk.org (Postfix) with ESMTP id B57C0CA35 for ; Fri, 18 Dec 2020 10:34:38 +0100 (CET) X-QQ-mid: bizesmtp28t1608284072t8em26o0 Received: from localhost.localdomain.com (unknown [183.129.236.74]) by esmtp10.qq.com (ESMTP) with id ; Fri, 18 Dec 2020 17:34:32 +0800 (CST) X-QQ-SSF: 01400000002000C0D000B00A0000000 X-QQ-FEAT: l6IKqkG+Nbl80WpnV/W9rSFvjYnAH7t0Q4hdi3Mdu5JWdwx8FdQRkNxqsk0J4 S/JFgCd3ZCxpkR0HQ02VJWQDwhTIlznUJwfmm/Kj5DssEdE17xHay88a6IMg948GQ10yhG8 KHWnXFwsypeYDP1ERkO0KNjoZhXEZbfFW87hwm0qmo27INDB7TJCBAnaeUkYifVvUICTkTh 24o/OTW2LDGiRBsaelsnazztRvrjSZjBB1X+caLzKKZwqMDzIOHvj9loj18nCkuCi/4SuKZ 92z9ybj9dKm8PJ7zL3sLKkhqRGa4JHWOclTA00UpueG+miaIrkBlnsnmWwMPwEUDKHQO000 Jp5tPDL78NDnhU+3/zX4Kpcdh0uBA== X-QQ-GoodBg: 2 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Date: Fri, 18 Dec 2020 17:36:31 +0800 Message-Id: <20201218093702.3651867-3-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201218093702.3651867-1-jiawenwu@trustnetic.com> References: <20201218093702.3651867-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybgforeign:qybgforeign5 X-QQ-Bgrelay: 1 Subject: [dpdk-dev] [PATCH v3 02/33] net/txgbe: add ntuple filter init and uninit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add ntuple filter init and uninit. Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_type.h | 1 + drivers/net/txgbe/txgbe_ethdev.c | 28 ++++++++++++++++++++++++ drivers/net/txgbe/txgbe_ethdev.h | 33 +++++++++++++++++++++++++++++ 3 files changed, 62 insertions(+) diff --git a/drivers/net/txgbe/base/txgbe_type.h b/drivers/net/txgbe/base/txgbe_type.h index b322a2cac..69aa8993a 100644 --- a/drivers/net/txgbe/base/txgbe_type.h +++ b/drivers/net/txgbe/base/txgbe_type.h @@ -15,6 +15,7 @@ #define TXGBE_FRAME_SIZE_DFT (1518) /* Default frame size, +FCS */ #define TXGBE_NUM_POOL (64) #define TXGBE_PBTXSIZE_MAX 0x00028000 /* 160KB Packet Buffer */ +#define TXGBE_MAX_FTQF_FILTERS 128 #define TXGBE_TXPKT_SIZE_MAX 0xA /* Max Tx Packet size */ #define TXGBE_MAX_UP 8 #define TXGBE_MAX_QP (128) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 0cd4c0908..1208e2f76 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -470,6 +470,7 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(eth_dev); struct txgbe_hwstrip *hwstrip = TXGBE_DEV_HWSTRIP(eth_dev); struct txgbe_dcb_config *dcb_config = TXGBE_DEV_DCB_CONFIG(eth_dev); + struct txgbe_filter_info *filter_info = TXGBE_DEV_FILTER(eth_dev); struct txgbe_bw_conf *bw_conf = TXGBE_DEV_BW_CONF(eth_dev); struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; const struct rte_memzone *mz; @@ -677,6 +678,13 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) /* enable support intr */ txgbe_enable_intr(eth_dev); + /* initialize filter info */ + memset(filter_info, 0, + sizeof(struct txgbe_filter_info)); + + /* initialize 5tuple filter list */ + TAILQ_INIT(&filter_info->fivetuple_list); + /* initialize bandwidth configuration info */ memset(bw_conf, 0, sizeof(struct txgbe_bw_conf)); @@ -696,6 +704,23 @@ eth_txgbe_dev_uninit(struct rte_eth_dev *eth_dev) return 0; } +static int txgbe_ntuple_filter_uninit(struct rte_eth_dev *eth_dev) +{ + struct txgbe_filter_info *filter_info = TXGBE_DEV_FILTER(eth_dev); + struct txgbe_5tuple_filter *p_5tuple; + + while ((p_5tuple = TAILQ_FIRST(&filter_info->fivetuple_list))) { + TAILQ_REMOVE(&filter_info->fivetuple_list, + p_5tuple, + entries); + rte_free(p_5tuple); + } + memset(filter_info->fivetuple_mask, 0, + sizeof(uint32_t) * TXGBE_5TUPLE_ARRAY_SIZE); + + return 0; +} + static int eth_txgbe_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, struct rte_pci_device *pci_dev) @@ -1774,6 +1799,9 @@ txgbe_dev_close(struct rte_eth_dev *dev) rte_free(dev->data->hash_mac_addrs); dev->data->hash_mac_addrs = NULL; + /* Remove all ntuple filters of the device */ + txgbe_ntuple_filter_uninit(dev); + return ret; } diff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h index e4eab6342..ab3a5ea47 100644 --- a/drivers/net/txgbe/txgbe_ethdev.h +++ b/drivers/net/txgbe/txgbe_ethdev.h @@ -113,6 +113,36 @@ struct txgbe_vf_info { uint16_t mac_count; }; +TAILQ_HEAD(txgbe_5tuple_filter_list, txgbe_5tuple_filter); + +struct txgbe_5tuple_filter_info { + uint32_t dst_ip; + uint32_t src_ip; + uint16_t dst_port; + uint16_t src_port; + enum txgbe_5tuple_protocol proto; /* l4 protocol. */ + uint8_t priority; /* seven levels (001b-111b), 111b is highest, + * used when more than one filter matches. + */ + uint8_t dst_ip_mask:1, /* if mask is 1b, do not compare dst ip. */ + src_ip_mask:1, /* if mask is 1b, do not compare src ip. */ + dst_port_mask:1, /* if mask is 1b, do not compare dst port. */ + src_port_mask:1, /* if mask is 1b, do not compare src port. */ + proto_mask:1; /* if mask is 1b, do not compare protocol. */ +}; + +/* 5tuple filter structure */ +struct txgbe_5tuple_filter { + TAILQ_ENTRY(txgbe_5tuple_filter) entries; + uint16_t index; /* the index of 5tuple filter */ + struct txgbe_5tuple_filter_info filter_info; + uint16_t queue; /* rx queue assigned to */ +}; + +#define TXGBE_5TUPLE_ARRAY_SIZE \ + (RTE_ALIGN(TXGBE_MAX_FTQF_FILTERS, (sizeof(uint32_t) * NBBY)) / \ + (sizeof(uint32_t) * NBBY)) + struct txgbe_ethertype_filter { uint16_t ethertype; uint32_t etqf; @@ -131,6 +161,9 @@ struct txgbe_filter_info { uint8_t ethertype_mask; /* Bit mask for every used ethertype filter */ /* store used ethertype filters*/ struct txgbe_ethertype_filter ethertype_filters[TXGBE_ETF_ID_MAX]; + /* Bit mask for every used 5tuple filter */ + uint32_t fivetuple_mask[TXGBE_5TUPLE_ARRAY_SIZE]; + struct txgbe_5tuple_filter_list fivetuple_list; }; /* The configuration of bandwidth */ -- 2.18.2