From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (xvm-189-124.dc0.ghst.net [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B470EA0524; Fri, 8 Jan 2021 06:13:21 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 32282140DED; Fri, 8 Jan 2021 06:13:13 +0100 (CET) Received: from mail-pl1-f177.google.com (mail-pl1-f177.google.com [209.85.214.177]) by mails.dpdk.org (Postfix) with ESMTP id F1FDB140DE3 for ; Fri, 8 Jan 2021 06:13:10 +0100 (CET) Received: by mail-pl1-f177.google.com with SMTP id g3so5085584plp.2 for ; Thu, 07 Jan 2021 21:13:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QjJsPQwxHzH6eKBpzx/SBNEjsRg91DUBB1vquBRgSeI=; b=mnbKpzO4M1ra/cCBv5pPN5q7TjcVNfTeVfLxzWxJ+zOHdesBeMNoOB6tj2WtnysESj hqUldz3meoOGl/4Bd72TxXK46hvIP1PBbfeZiDncZ5s9rUqD8GrmxsKCfvUNq0sKegRw fkZ0VDwppkHtyWLG7ORFIU+o+VLvo60e8UlqlMElnnpffhff7khqvJUwFxAYiigMMcVl PI7+ntGK6mFKSvNPZFZzOwHj+YLqIlA8iNOyP3lgrNSGtrR5I53jUFrsCJX6X93ahDmT mYkjnkAkRNzq7AX54TySY2EVlCtp2PNHDr1np86/E0hUqxtWgGtBnIACcPR9uo/zxd+d +YXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QjJsPQwxHzH6eKBpzx/SBNEjsRg91DUBB1vquBRgSeI=; b=QUObsIdO6Wd6rIrtASWohIzjA1BpuO+RnlMb3amWxruOSZgujqChX8VVTpfOyADWDV w20n43Sav9tvzmCjUR60y4xB/+X/sZg8rY7y+wdSOtfyywdfq1JtYBlLYpeOLP0nPUBk E3rf1fntOVuOSZjBIRBH+zN+TsJw7Q3n3bYcCqtyPaHtNdcim03wjKEIfrPnaCpAsSV+ 6euEwMLyMT01I7icpyc2efAVnPeskaJ8xbNMAZpAlz9RtQd0ZUINrgLot0M1iWeEcuG4 SGV1q2og5VIo0pgf6isrHkqzKUWR9PvkCHqYsQ6RzLwQQ0D2ZleRFvbEJyuuBDg54fG8 qRaQ== X-Gm-Message-State: AOAM530OubY36J7pAIRyH9YfTB+wve2ilBbbRrjov3hqwn04pooB+L3S KfO8T38Zo/2g3vaE6IaWtjQL1UUcV9cxhg== X-Google-Smtp-Source: ABdhPJyvmBpX94GaqexK7k6M6SnF1gkY+8uWeGM0Mpoe5Oo6Iu0gLz9BSv3F7LCpdvLsujUkaRaZgQ== X-Received: by 2002:a17:902:7e85:b029:da:72a2:de1 with SMTP id z5-20020a1709027e85b02900da72a20de1mr2139968pla.57.1610082789874; Thu, 07 Jan 2021 21:13:09 -0800 (PST) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id n15sm7688829pgl.31.2021.01.07.21.13.08 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 Jan 2021 21:13:09 -0800 (PST) From: Ajit Khaparde X-Google-Original-From: Ajit Khaparde To: dev@dpdk.org Cc: Kalesh AP Date: Thu, 7 Jan 2021 21:12:57 -0800 Message-Id: <20210108051301.33416-3-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210108051301.33416-1-ajit.khaparde@broadcom.com> References: <20210103034627.80169-1-ajit.khaparde@broadcom.com> <20210108051301.33416-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v3 2/6] net/bnxt: add new RX checksum mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kalesh AP The 58818 chips support two different checksum modes. Host driver has to register with FW which checksum mode it prefers to use. DPDK driver want to use "cs_all_ok_mode=1". FW advertises the support of the different checksum modes on per VNIC basis in the HWRM_VNIC_QCAPS response. Driver should use HWRM_VNIC_CFG to configure the needed checksum mode. Signed-off-by: Kalesh AP Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/bnxt.h | 1 + drivers/net/bnxt/bnxt_hwrm.c | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index 0d3998f20..14f52b2c4 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -679,6 +679,7 @@ struct bnxt { uint32_t vnic_cap_flags; #define BNXT_VNIC_CAP_COS_CLASSIFY BIT(0) #define BNXT_VNIC_CAP_OUTER_RSS BIT(1) +#define BNXT_VNIC_CAP_RX_CMPL_V2 BIT(2) unsigned int rx_nr_rings; unsigned int rx_cp_nr_rings; unsigned int rx_num_qs_per_vnic; diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index 36c229de1..350fe2f97 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -860,6 +860,9 @@ int bnxt_hwrm_vnic_qcaps(struct bnxt *bp) if (flags & HWRM_VNIC_QCAPS_OUTPUT_FLAGS_OUTERMOST_RSS_CAP) bp->vnic_cap_flags |= BNXT_VNIC_CAP_OUTER_RSS; + if (flags & HWRM_VNIC_QCAPS_OUTPUT_FLAGS_RX_CMPL_V2_CAP) + bp->vnic_cap_flags |= BNXT_VNIC_CAP_RX_CMPL_V2; + bp->max_tpa_v2 = rte_le_to_cpu_16(resp->max_aggs_supported); HWRM_UNLOCK(); @@ -1961,6 +1964,11 @@ int bnxt_hwrm_vnic_cfg(struct bnxt *bp, struct bnxt_vnic_info *vnic) rte_cpu_to_le_16(cpr->cp_ring_struct->fw_ring_id); enables = HWRM_VNIC_CFG_INPUT_ENABLES_DEFAULT_RX_RING_ID | HWRM_VNIC_CFG_INPUT_ENABLES_DEFAULT_CMPL_RING_ID; + if (bp->vnic_cap_flags & BNXT_VNIC_CAP_RX_CMPL_V2) { + enables |= HWRM_VNIC_CFG_INPUT_ENABLES_RX_CSUM_V2_MODE; + req.rx_csum_v2_mode = + HWRM_VNIC_CFG_INPUT_RX_CSUM_V2_MODE_ALL_OK; + } goto config_mru; } -- 2.21.1 (Apple Git-122.3)