From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (xvm-189-124.dc0.ghst.net [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 684E1A0524; Fri, 8 Jan 2021 06:13:29 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 61AC9140DF4; Fri, 8 Jan 2021 06:13:14 +0100 (CET) Received: from mail-pl1-f177.google.com (mail-pl1-f177.google.com [209.85.214.177]) by mails.dpdk.org (Postfix) with ESMTP id 2C6F9140DE7 for ; Fri, 8 Jan 2021 06:13:12 +0100 (CET) Received: by mail-pl1-f177.google.com with SMTP id v3so5051543plz.13 for ; Thu, 07 Jan 2021 21:13:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7CF7wjFeCjl7zOahbAJm+gVEu5lGZ3LdjcDXoVa4RKk=; b=IKA5XZbW2O0rBcvwCTr8O6xYcKscUc1QWN7afAUX0a+MSYJxU9jJO1MCGoytj/HwHb 2t/b18EUJjaHJqn3L0RCOuJ3BqoG6xIABxEbFgr4W3LwvnppP/a1JWvsB+ZCYHnrrAiJ g3HoSEdqObH277Nv0bN9ivvFKFYdCCCaEHtJ4N2EE8KcQr1cLpVenBK7gWNVG6JtDAG7 mLkgHrH1b8Ywhua79brbL3oLvYT2sPoZLjr5IQygwWL9fNCzykUCal//IvSYWNj1MbDA Den5yt+h+tucQDu2ipb057hDb4DwMruRVo8VNfHhJb/5B2HRraBGjx1e5Ut/XDCxdBei 8jKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7CF7wjFeCjl7zOahbAJm+gVEu5lGZ3LdjcDXoVa4RKk=; b=BEeEx3Ilpc2rz+ZBBAc8Cp5yMqmYpltEwmqoZvrumkONFiZrZHZY88u8JXtVxYXlbg pZq2FjsNfzGxjiPzv1NAfcr9esZ2a98kwq6C1C/DLm9NVavOKwVm54Mb9KqR0uVXj0lp J64yZFFk5YY/PMySE7bvyaort3AK21/jjSpZl61czK+i+wkSv3CJxXcrAzGWGZVBb9vd oPuX+4AN8km0uUqXiV95TiRdpH701s/AghQaV7acOmGTExf9k8fDZNzh2PEy1sUxqupA 2vezH7c1xPP/FPRXbqcjdJ6IgvAK2xQM/htoNOoVoBnoHxZTPrTCHLb/FFw1tlVV2EtX 5z5g== X-Gm-Message-State: AOAM5311pe+okltRLVFEVMQTC5kBx/8XBuYVkzMFgoZX+Ssva4BbRM5H ZR4w5FDOeCudkltM+MUcm5U1D+At6i7Jdg== X-Google-Smtp-Source: ABdhPJyEDwo3YgatDPpbvALeH7jurFdawwp9rhCT6SE1yZ+1wxtrlXqeee4W/uzpWx6oICxQvWdDTw== X-Received: by 2002:a17:902:ac90:b029:da:fd0c:53ba with SMTP id h16-20020a170902ac90b02900dafd0c53bamr2176901plr.23.1610082791091; Thu, 07 Jan 2021 21:13:11 -0800 (PST) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id n15sm7688829pgl.31.2021.01.07.21.13.10 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 Jan 2021 21:13:10 -0800 (PST) From: Ajit Khaparde X-Google-Original-From: Ajit Khaparde To: dev@dpdk.org Cc: Kalesh AP Date: Thu, 7 Jan 2021 21:12:58 -0800 Message-Id: <20210108051301.33416-4-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210108051301.33416-1-ajit.khaparde@broadcom.com> References: <20210103034627.80169-1-ajit.khaparde@broadcom.com> <20210108051301.33416-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v3 3/6] net/bnxt: modify VNIC accounting X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kalesh AP Modify VNIC accounting when enabling RFS on newer chips. Unlike legacy chips, newer chips don't need additional VNIC resources for ntuple filter. Fix the code accordingly so that we don't reserve and allocate additional VNICs on newer chips. Signed-off-by: Kalesh AP Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/bnxt.h | 3 +++ drivers/net/bnxt/bnxt_ethdev.c | 18 ++++++++++++++---- drivers/net/bnxt/bnxt_flow.c | 14 ++++++++++++-- drivers/net/bnxt/bnxt_hwrm.c | 32 ++++++++++++++++++++++++++++++++ drivers/net/bnxt/bnxt_hwrm.h | 5 +++-- 5 files changed, 64 insertions(+), 8 deletions(-) diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index 14f52b2c4..276d807c7 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -643,6 +643,9 @@ struct bnxt { #define BNXT_FLAG_DFLT_MAC_SET BIT(26) #define BNXT_FLAG_TRUFLOW_EN BIT(27) #define BNXT_FLAG_GFID_ENABLE BIT(28) +#define BNXT_FLAG_RFS_NEEDS_VNIC BIT(29) +#define BNXT_FLAG_FLOW_CFA_RFS_RING_TBL_IDX_V2 BIT(30) +#define BNXT_RFS_NEEDS_VNIC(bp) ((bp)->flags & BNXT_FLAG_RFS_NEEDS_VNIC) #define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF)) #define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF) #define BNXT_NPAR(bp) ((bp)->flags & BNXT_FLAG_NPAR_PF) diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index 02ab87bba..8ca4fb151 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -748,11 +748,17 @@ static int bnxt_init_chip(struct bnxt *bp) goto err_out; } + /* default vnic 0 */ + rc = bnxt_setup_one_vnic(bp, 0); + if (rc) + goto err_out; /* VNIC configuration */ - for (i = 0; i < bp->nr_vnics; i++) { - rc = bnxt_setup_one_vnic(bp, i); - if (rc) - goto err_out; + if (BNXT_RFS_NEEDS_VNIC(bp)) { + for (i = 1; i < bp->nr_vnics; i++) { + rc = bnxt_setup_one_vnic(bp, i); + if (rc) + goto err_out; + } } rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL); @@ -4698,6 +4704,10 @@ static int bnxt_init_fw(struct bnxt *bp) if (rc) return rc; + rc = bnxt_hwrm_cfa_adv_flow_mgmt_qcaps(bp); + if (rc) + return rc; + bnxt_hwrm_port_mac_qcfg(bp); bnxt_hwrm_parent_pf_qcfg(bp); diff --git a/drivers/net/bnxt/bnxt_flow.c b/drivers/net/bnxt/bnxt_flow.c index 127d51c45..07d359edf 100644 --- a/drivers/net/bnxt/bnxt_flow.c +++ b/drivers/net/bnxt/bnxt_flow.c @@ -1056,6 +1056,13 @@ bnxt_validate_and_parse_flow(struct rte_eth_dev *dev, } PMD_DRV_LOG(DEBUG, "Queue index %d\n", act_q->index); + if (use_ntuple && !BNXT_RFS_NEEDS_VNIC(bp)) { + filter->flags = + HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DEST_RFS_RING_IDX; + filter->dst_id = act_q->index; + goto skip_vnic_alloc; + } + vnic_id = attr->group; if (!vnic_id) { PMD_DRV_LOG(DEBUG, "Group id is 0\n"); @@ -1127,7 +1134,7 @@ bnxt_validate_and_parse_flow(struct rte_eth_dev *dev, PMD_DRV_LOG(DEBUG, "Setting vnic ff_idx %d\n", vnic->ff_pool_idx); filter->dst_id = vnic->fw_vnic_id; - +skip_vnic_alloc: /* For ntuple filter, create the L2 filter with default VNIC. * The user specified redirect queue will be set while creating * the ntuple filter in hardware. @@ -1808,7 +1815,10 @@ bnxt_flow_create(struct rte_eth_dev *dev, } } - vnic = find_matching_vnic(bp, filter); + if (BNXT_RFS_NEEDS_VNIC(bp)) + vnic = find_matching_vnic(bp, filter); + else + vnic = BNXT_GET_DEFAULT_VNIC(bp); done: if (!ret || update_flow) { flow->filter = filter; diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index 350fe2f97..56e2e33a9 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -5834,3 +5834,35 @@ int bnxt_hwrm_cfa_pair_free(struct bnxt *bp, struct bnxt_representor *rep_bp) rep_bp->vf_id); return rc; } + +int bnxt_hwrm_cfa_adv_flow_mgmt_qcaps(struct bnxt *bp) +{ + struct hwrm_cfa_adv_flow_mgnt_qcaps_output *resp = + bp->hwrm_cmd_resp_addr; + struct hwrm_cfa_adv_flow_mgnt_qcaps_input req = {0}; + uint32_t flags = 0; + int rc = 0; + + if (!(bp->fw_cap & BNXT_FW_CAP_ADV_FLOW_MGMT)) + return 0; + + if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) { + PMD_DRV_LOG(DEBUG, + "Not a PF or trusted VF. Command not supported\n"); + return 0; + } + + HWRM_PREP(&req, HWRM_CFA_ADV_FLOW_MGNT_QCAPS, BNXT_USE_CHIMP_MB); + rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB); + + HWRM_CHECK_RESULT(); + flags = rte_le_to_cpu_32(resp->flags); + HWRM_UNLOCK(); + + if (flags & HWRM_CFA_ADV_FLOW_MGNT_QCAPS_RFS_RING_TBL_IDX_V2_SUPPORTED) + bp->flags |= BNXT_FLAG_FLOW_CFA_RFS_RING_TBL_IDX_V2; + else + bp->flags |= BNXT_FLAG_RFS_NEEDS_VNIC; + + return rc; +} diff --git a/drivers/net/bnxt/bnxt_hwrm.h b/drivers/net/bnxt/bnxt_hwrm.h index 4b3290773..7deea29ca 100644 --- a/drivers/net/bnxt/bnxt_hwrm.h +++ b/drivers/net/bnxt/bnxt_hwrm.h @@ -55,8 +55,8 @@ struct hwrm_func_qstats_output; #define HWRM_PORT_PHY_CFG_IN_EN_AUTO_LINK_SPEED_MASK \ HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK -#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_L2_HDR_SRC_FILTER_EN \ -HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_L2_HEADER_SOURCE_FIELDS_SUPPORTED +#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_RFS_RING_TBL_IDX_V2_SUPPORTED \ + HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_RFS_RING_TBL_IDX_V2_SUPPORTED #define HWRM_SPEC_CODE_1_8_4 0x10804 #define HWRM_SPEC_CODE_1_9_0 0x10900 @@ -300,4 +300,5 @@ int bnxt_hwrm_first_vf_id_query(struct bnxt *bp, uint16_t fid, uint16_t *first_vf_id); int bnxt_hwrm_cfa_pair_alloc(struct bnxt *bp, struct bnxt_representor *rep); int bnxt_hwrm_cfa_pair_free(struct bnxt *bp, struct bnxt_representor *rep); +int bnxt_hwrm_cfa_adv_flow_mgmt_qcaps(struct bnxt *bp); #endif -- 2.21.1 (Apple Git-122.3)