From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 91603A0A03; Mon, 18 Jan 2021 10:37:43 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D37A5140D4D; Mon, 18 Jan 2021 10:37:14 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 21432140D1D for ; Mon, 18 Jan 2021 10:37:09 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 10I9QqGd001601 for ; Mon, 18 Jan 2021 01:37:08 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=3PIYTQNMMBaiqkOzTN8ZFfsNWrZ2Ig0/+oBtAURe1QM=; b=KysqFCpBrGpcClkCFuYU41bqgf/Ol+8nz9ZKwwsAOmNrbYXb4uF00imzSdF0/CcAz2Kg q4fbKM86jZJp4rea+1sM+W9oEFTsuxHHdcqPixNZUsXa3aTqpD8kpiwKPRRKSK3G/EZT +IJ2ioDUF6FdDdt51cnQwe70E3/gMhH9MZiy8atP/LdRQEI5DP6yAIQgsLZGwhsCc2Rj djAPk0Ep2/ZT9fnB46XLHHHw4KVfrbPHlO7NTS63+dOc6s7gweVGFS9WNhdpVLYngeOM YSkZmiFO/b3Cz0ooxga0rovYcKUwnENUfrdw+vs+ykVRiK1I8Bt07ixtdsVESI7zoNaf YA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 3640hsu1xj-5 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 18 Jan 2021 01:37:08 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 18 Jan 2021 01:37:06 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 18 Jan 2021 01:37:05 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 18 Jan 2021 01:37:05 -0800 Received: from localhost.localdomain (unknown [10.111.145.157]) by maili.marvell.com (Postfix) with ESMTP id 150083F7040; Mon, 18 Jan 2021 01:37:05 -0800 (PST) From: Nalla Pradeep To: Nalla Pradeep , Radha Mohan Chintakuntla , Veerasenareddy Burru CC: , , Date: Mon, 18 Jan 2021 09:35:56 +0000 Message-ID: <20210118093602.5449-5-pnalla@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210118093602.5449-1-pnalla@marvell.com> References: <20210118093602.5449-1-pnalla@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737 definitions=2021-01-18_07:2021-01-15, 2021-01-18 signatures=0 Subject: [dpdk-dev] [PATCH v2 05/11] net/octeontx_ep: Add dev info get and configure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add device information get and device configure operations. Signed-off-by: Nalla Pradeep --- drivers/net/octeontx_ep/otx_ep_common.h | 16 +++++ drivers/net/octeontx_ep/otx_ep_ethdev.c | 89 ++++++++++++++++++++++++- drivers/net/octeontx_ep/otx_ep_rxtx.h | 10 +++ 3 files changed, 112 insertions(+), 3 deletions(-) create mode 100644 drivers/net/octeontx_ep/otx_ep_rxtx.h diff --git a/drivers/net/octeontx_ep/otx_ep_common.h b/drivers/net/octeontx_ep/otx_ep_common.h index 4ec7638219..f3a08cdfa4 100644 --- a/drivers/net/octeontx_ep/otx_ep_common.h +++ b/drivers/net/octeontx_ep/otx_ep_common.h @@ -7,9 +7,12 @@ #define OTX_EP_MAX_RINGS_PER_VF (8) #define OTX_EP_CFG_IO_QUEUES OTX_EP_MAX_RINGS_PER_VF #define OTX_EP_64BYTE_INSTR (64) +#define OTX_EP_MIN_IQ_DESCRIPTORS (128) +#define OTX_EP_MIN_OQ_DESCRIPTORS (128) #define OTX_EP_MAX_IQ_DESCRIPTORS (8192) #define OTX_EP_MAX_OQ_DESCRIPTORS (8192) #define OTX_EP_OQ_BUF_SIZE (2048) +#define OTX_EP_MIN_RX_BUF_SIZE (64) #define OTX_EP_OQ_INFOPTR_MODE (0) #define OTX_EP_OQ_REFIL_THRESHOLD (16) @@ -112,6 +115,10 @@ struct otx_ep_device { struct otx_ep_fn_list fn_list; + uint32_t max_tx_queues; + + uint32_t max_rx_queues; + /* SR-IOV info */ struct otx_ep_sriov_info sriov_info; @@ -119,5 +126,14 @@ struct otx_ep_device { const struct otx_ep_config *conf; int port_configured; + + uint64_t rx_offloads; + + uint64_t tx_offloads; }; + +#define OTX_EP_MAX_PKT_SZ 64000U + +#define OTX_EP_MAX_MAC_ADDRS 1 + #endif /* _OTX_EP_COMMON_H_ */ diff --git a/drivers/net/octeontx_ep/otx_ep_ethdev.c b/drivers/net/octeontx_ep/otx_ep_ethdev.c index 53e79d70ae..3ba391dc02 100644 --- a/drivers/net/octeontx_ep/otx_ep_ethdev.c +++ b/drivers/net/octeontx_ep/otx_ep_ethdev.c @@ -10,8 +10,57 @@ #include "otx_ep_common.h" #include "otx_ep_vf.h" #include "otx2_ep_vf.h" +#include "otx_ep_rxtx.h" + +#define OTX_EP_DEV(_eth_dev) \ + ((struct otx_ep_device *)(_eth_dev)->data->dev_private) + +static const struct rte_eth_desc_lim otx_ep_rx_desc_lim = { + .nb_max = OTX_EP_MAX_OQ_DESCRIPTORS, + .nb_min = OTX_EP_MIN_OQ_DESCRIPTORS, + .nb_align = OTX_EP_RXD_ALIGN, +}; + +static const struct rte_eth_desc_lim otx_ep_tx_desc_lim = { + .nb_max = OTX_EP_MAX_IQ_DESCRIPTORS, + .nb_min = OTX_EP_MIN_IQ_DESCRIPTORS, + .nb_align = OTX_EP_TXD_ALIGN, +}; + +static int +otx_ep_dev_info_get(struct rte_eth_dev *eth_dev, + struct rte_eth_dev_info *devinfo) +{ + struct otx_ep_device *otx_epvf; + struct rte_pci_device *pdev; + uint32_t dev_id; + + otx_epvf = OTX_EP_DEV(eth_dev); + pdev = otx_epvf->pdev; + dev_id = pdev->id.device_id; + + devinfo->speed_capa = ETH_LINK_SPEED_10G; + devinfo->max_rx_queues = otx_epvf->max_rx_queues; + devinfo->max_tx_queues = otx_epvf->max_tx_queues; + + devinfo->min_rx_bufsize = OTX_EP_MIN_RX_BUF_SIZE; + if (dev_id == PCI_DEVID_OCTEONTX_EP_VF || + dev_id == PCI_DEVID_OCTEONTX2_EP_NET_VF || + dev_id == PCI_DEVID_CN98XX_EP_NET_VF) { + devinfo->max_rx_pktlen = OTX_EP_MAX_PKT_SZ; + devinfo->rx_offload_capa = DEV_RX_OFFLOAD_JUMBO_FRAME; + devinfo->rx_offload_capa |= DEV_RX_OFFLOAD_SCATTER; + devinfo->tx_offload_capa = DEV_TX_OFFLOAD_MULTI_SEGS; + } + + devinfo->max_mac_addrs = OTX_EP_MAX_MAC_ADDRS; + + devinfo->rx_desc_lim = otx_ep_rx_desc_lim; + devinfo->tx_desc_lim = otx_ep_tx_desc_lim; + + return 0; +} -#define OTX_EP_DEV(_eth_dev) ((_eth_dev)->data->dev_private) static int otx_ep_chip_specific_setup(struct otx_ep_device *otx_epvf) { @@ -62,6 +111,41 @@ otx_epdev_init(struct otx_ep_device *otx_epvf) return -ENOMEM; } +static int +otx_ep_dev_configure(struct rte_eth_dev *eth_dev) +{ + struct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev); + struct rte_eth_dev_data *data = eth_dev->data; + struct rte_eth_rxmode *rxmode; + struct rte_eth_txmode *txmode; + struct rte_eth_conf *conf; + uint32_t ethdev_queues; + + conf = &data->dev_conf; + rxmode = &conf->rxmode; + txmode = &conf->txmode; + ethdev_queues = (uint32_t)(otx_epvf->sriov_info.rings_per_vf); + if (eth_dev->data->nb_rx_queues > ethdev_queues || + eth_dev->data->nb_tx_queues > ethdev_queues) { + otx_ep_err("invalid num queues\n"); + return -ENOMEM; + } + otx_ep_info("OTX_EP Device is configured with num_txq %d num_rxq %d\n", + eth_dev->data->nb_rx_queues, eth_dev->data->nb_tx_queues); + + otx_epvf->port_configured = 1; + otx_epvf->rx_offloads = rxmode->offloads; + otx_epvf->tx_offloads = txmode->offloads; + + return 0; +} + +/* Define our ethernet definitions */ +static const struct eth_dev_ops otx_ep_eth_dev_ops = { + .dev_configure = otx_ep_dev_configure, + .dev_infos_get = otx_ep_dev_info_get, +}; + static int otx_ep_eth_dev_uninit(struct rte_eth_dev *eth_dev) { @@ -99,6 +183,7 @@ otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev) } otx_epvf->eth_dev = eth_dev; otx_epvf->port_id = eth_dev->data->port_id; + eth_dev->dev_ops = &otx_ep_eth_dev_ops; eth_dev->data->mac_addrs = rte_zmalloc("otx_ep", RTE_ETHER_ADDR_LEN, 0); if (eth_dev->data->mac_addrs == NULL) { otx_ep_err("MAC addresses memory allocation failed\n"); @@ -139,8 +224,6 @@ static const struct rte_pci_id pci_id_otx_ep_map[] = { { .vendor_id = 0, /* sentinel */ } }; - - static struct rte_pci_driver rte_otx_ep_pmd = { .id_table = pci_id_otx_ep_map, .drv_flags = RTE_PCI_DRV_NEED_MAPPING, diff --git a/drivers/net/octeontx_ep/otx_ep_rxtx.h b/drivers/net/octeontx_ep/otx_ep_rxtx.h new file mode 100644 index 0000000000..269ecbe1a7 --- /dev/null +++ b/drivers/net/octeontx_ep/otx_ep_rxtx.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2020 Marvell. + */ + +#ifndef _OTX_EP_RXTX_H_ +#define _OTX_EP_RXTX_H_ + +#define OTX_EP_RXD_ALIGN 1 +#define OTX_EP_TXD_ALIGN 1 +#endif -- 2.17.1