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From: dapengx.yu@intel.com
To: beilei.xing@intel.com, jia.guo@intel.com
Cc: dev@dpdk.org, Dapeng Yu <dapengx.yu@intel.com>, stable@dpdk.org
Subject: [dpdk-dev] [PATCH] net/i40e: fix register setting for hash enable
Date: Tue, 26 Jan 2021 17:52:11 +0800
Message-ID: <20210126095211.628354-1-dapengx.yu@intel.com> (raw)

From: Dapeng Yu <dapengx.yu@intel.com>

The original code causes wrong value to be set into PFQF_HENA
register because unnecessary calling to get translated pctype
value for X722 NIC. The result is RSS cannot work.

So remove the unnecessary translation.

Fixes: ef4c16fd9148 ("net/i40e: refactor RSS flow")
Cc: stable@dpdk.org

Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
 drivers/net/i40e/i40e_hash.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/net/i40e/i40e_hash.c b/drivers/net/i40e/i40e_hash.c
index 9271797a7..b1cb24f43 100644
--- a/drivers/net/i40e/i40e_hash.c
+++ b/drivers/net/i40e/i40e_hash.c
@@ -678,10 +678,6 @@ i40e_hash_enable_pctype(struct i40e_hw *hw,
 	uint32_t reg, reg_val, mask;
-	/* For X722, get translated pctype in fd pctype register */
-	if (hw->mac.type == I40E_MAC_X722)
-		pctype = i40e_read_rx_ctl(hw, I40E_GLQF_FD_PCTYPES(pctype));
 	if (pctype < 32) {
 		mask = BIT(pctype);
 		reg = I40E_PFQF_HENA(0);

             reply	other threads:[~2021-01-26  9:52 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-26  9:52 dapengx.yu [this message]
2021-01-27  1:44 ` Xing, Beilei
2021-01-27  2:16   ` Yu, DapengX
2021-01-27  3:07 ` Xing, Beilei
2021-01-28 13:31   ` Zhang, Qi Z

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