From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 303EBA052A; Wed, 27 Jan 2021 17:12:25 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C0A25140F01; Wed, 27 Jan 2021 17:10:28 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 8A9D7140EFF for ; Wed, 27 Jan 2021 17:10:26 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 10RG5mYj027270; Wed, 27 Jan 2021 08:10:25 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=OCl/Ykxh+U5zXziu7UQvJYf5NZOTYzrUGeVSVeyYzgQ=; b=lEqrPm/3DjJiUR33P08F/y2BsQy8GDLWSkEfzIk7Qks35uTbixC9imVwMgiK52uej4+p pP1Hq4qFg/rs4UsAkD/8X09+x7uEO+5nXlvu+ZbcW+aDJ6wAZ0HMFF8GPbrIzjfPhNeS 2vhjNAtHAbnQFOK8bPXggbbe5flZgvSM30E1R2tdgfZ7PA22hgiOkJRkM+HPbI8N0hF3 QjATl4V7Rr3jcILXFIXcu4ffSlS4pEUeesWz0TCCoWrjiCmj0aHJen3iUNVQ1kkx8Srl Y+hGquHVbC+h73NqOxBhaQ7yPtLmTbre+2ye3bo4v+uJZ0cMhTuVEY5YzwTRY8laMiYd fw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 368j1uc389-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 27 Jan 2021 08:10:25 -0800 Received: from SC-EXCH04.marvell.com (10.93.176.84) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 27 Jan 2021 08:10:22 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 27 Jan 2021 08:10:21 -0800 Received: from pt-lxl0023.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 27 Jan 2021 08:10:20 -0800 From: To: , CC: , Yuri Chipchev , Liron Himi Date: Wed, 27 Jan 2021 18:09:25 +0200 Message-ID: <20210127160948.6008-12-lironh@marvell.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20210127160948.6008-1-lironh@marvell.com> References: <20210122191925.24308-1-lironh@marvell.com> <20210127160948.6008-1-lironh@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737 definitions=2021-01-27_05:2021-01-27, 2021-01-27 signatures=0 Subject: [dpdk-dev] [PATCH v3 11/34] net/mvpp2: add VLAN offload support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Yuri Chipchev Enable VLAN filter configuration Signed-off-by: Yuri Chipchev Reviewed-by: Liron Himi --- drivers/net/mvpp2/mrvl_ethdev.c | 110 +++++++++++++++++++++++++------- 1 file changed, 86 insertions(+), 24 deletions(-) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index e64847f4a1..8659cd9792 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -616,6 +616,51 @@ mrvl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id) return 0; } +/** + * Populate VLAN Filter configuration. + * + * @param dev + * Pointer to Ethernet device structure. + * @param on + * Toggle filter. + * + * @return + * 0 on success, negative error value otherwise. + */ +static int mrvl_populate_vlan_table(struct rte_eth_dev *dev, int on) +{ + uint32_t j; + int ret; + struct rte_vlan_filter_conf *vfc; + + vfc = &dev->data->vlan_filter_conf; + for (j = 0; j < RTE_DIM(vfc->ids); j++) { + uint64_t vlan; + uint64_t vbit; + uint64_t ids = vfc->ids[j]; + + if (ids == 0) + continue; + + while (ids) { + vlan = 64 * j; + /* count trailing zeroes */ + vbit = ~ids & (ids - 1); + /* clear least significant bit set */ + ids ^= (ids ^ (ids - 1)) ^ vbit; + for (; vbit; vlan++) + vbit >>= 1; + ret = mrvl_vlan_filter_set(dev, vlan, on); + if (ret) { + MRVL_LOG(ERR, "Failed to setup VLAN filter\n"); + return ret; + } + } + } + + return 0; +} + /** * DPDK callback to start the device. * @@ -631,8 +676,6 @@ mrvl_dev_start(struct rte_eth_dev *dev) struct mrvl_priv *priv = dev->data->dev_private; char match[MRVL_MATCH_LEN]; int ret = 0, i, def_init_size; - uint32_t j; - struct rte_vlan_filter_conf *vfc; struct rte_ether_addr *mac_addr; if (priv->ppio) @@ -715,28 +758,11 @@ mrvl_dev_start(struct rte_eth_dev *dev) if (dev->data->all_multicast == 1) mrvl_allmulticast_enable(dev); - vfc = &dev->data->vlan_filter_conf; - for (j = 0; j < RTE_DIM(vfc->ids); j++) { - uint64_t vlan; - uint64_t vbit; - uint64_t ids = vfc->ids[j]; - - if (ids == 0) - continue; - - while (ids) { - vlan = 64 * j; - /* count trailing zeroes */ - vbit = ~ids & (ids - 1); - /* clear least significant bit set */ - ids ^= (ids ^ (ids - 1)) ^ vbit; - for (; vbit; vlan++) - vbit >>= 1; - ret = mrvl_vlan_filter_set(dev, vlan, 1); - if (ret) { - MRVL_LOG(ERR, "Failed to setup VLAN filter\n"); - goto out; - } + if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_VLAN_FILTER) { + ret = mrvl_populate_vlan_table(dev, 1); + if (ret) { + MRVL_LOG(ERR, "Failed to populate VLAN table"); + goto out; } } @@ -1671,6 +1697,41 @@ mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) pp2_ppio_remove_vlan(priv->ppio, vlan_id); } +/** + * DPDK callback to Configure VLAN offload. + * + * @param dev + * Pointer to Ethernet device structure. + * @param mask + * VLAN offload mask. + * + * @return + * 0 on success, negative error value otherwise. + */ +static int mrvl_vlan_offload_set(struct rte_eth_dev *dev, int mask) +{ + uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads; + int ret; + + if (mask & ETH_VLAN_STRIP_MASK) + MRVL_LOG(ERR, "VLAN stripping is not supported\n"); + + if (mask & ETH_VLAN_FILTER_MASK) { + if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER) + ret = mrvl_populate_vlan_table(dev, 1); + else + ret = mrvl_populate_vlan_table(dev, 0); + + if (ret) + return ret; + } + + if (mask & ETH_VLAN_EXTEND_MASK) + MRVL_LOG(ERR, "Extend VLAN not supported\n"); + + return 0; +} + /** * Release buffers to hardware bpool (buffer-pool) * @@ -2164,6 +2225,7 @@ static const struct eth_dev_ops mrvl_ops = { .rxq_info_get = mrvl_rxq_info_get, .txq_info_get = mrvl_txq_info_get, .vlan_filter_set = mrvl_vlan_filter_set, + .vlan_offload_set = mrvl_vlan_offload_set, .tx_queue_start = mrvl_tx_queue_start, .tx_queue_stop = mrvl_tx_queue_stop, .rx_queue_setup = mrvl_rx_queue_setup, -- 2.28.0