From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3DE95A052A; Wed, 27 Jan 2021 17:12:36 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 14303140F0D; Wed, 27 Jan 2021 17:10:30 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 3F74C140F01 for ; Wed, 27 Jan 2021 17:10:27 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 10RG6q4p017546; Wed, 27 Jan 2021 08:10:26 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=5i1QPRvGi1n1u+iF+3eOMZuG0I+fbqey6AZwDOwPM6g=; b=ieiolmykiEGxcQ9aizUQSEBg8K/KRYFKGR1DihzsIQcqnLG9hMYV2sIWOCH8BsOkb1ow zlZH7FwE9JTsQz6Ajx2B7jQZR24jhlRlEhH4mVnvRfL1ktHYw0dF+rcHqlHRgOE6OWVf afaK4eI6N0KziVINoyHcpbn32CeEjAiy8PccbUS+qyvJVVZ60xsXLcEYgjhug3boHzzV hF5Nc0fMLRQ3ZN7HOmqNVuQA0mr+7UYiloxCY3tlxdDjozE+Si7AHeik8YeylXUUi+72 EXTD8k7IOwZ8xNAAEOqSdaq243kY54vGc+C08IQsyVXLjf+5r8yi3ybnJdcyM/HuGxV2 /Q== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 36b1xphft4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 27 Jan 2021 08:10:26 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 27 Jan 2021 08:10:24 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 27 Jan 2021 08:10:23 -0800 Received: from pt-lxl0023.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 27 Jan 2021 08:10:22 -0800 From: To: , CC: , Liron Himi Date: Wed, 27 Jan 2021 18:09:26 +0200 Message-ID: <20210127160948.6008-13-lironh@marvell.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20210127160948.6008-1-lironh@marvell.com> References: <20210122191925.24308-1-lironh@marvell.com> <20210127160948.6008-1-lironh@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737 definitions=2021-01-27_05:2021-01-27, 2021-01-27 signatures=0 Subject: [dpdk-dev] [PATCH v3 12/34] net/mvpp2: update Tx checksum X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Liron Himi According to the dpdk spec, only 'ol_flags' should be used for tx checksum generation Signed-off-by: Liron Himi --- drivers/net/mvpp2/mrvl_ethdev.c | 60 ++++++++++++++------------------- 1 file changed, 26 insertions(+), 34 deletions(-) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index 8659cd9792..99e2e5a670 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -63,11 +63,16 @@ DEV_RX_OFFLOAD_CHECKSUM) /** Port Tx offloads capabilities */ -#define MRVL_TX_OFFLOADS (DEV_TX_OFFLOAD_IPV4_CKSUM | \ - DEV_TX_OFFLOAD_UDP_CKSUM | \ - DEV_TX_OFFLOAD_TCP_CKSUM | \ +#define MRVL_TX_OFFLOAD_CHECKSUM (DEV_TX_OFFLOAD_IPV4_CKSUM | \ + DEV_TX_OFFLOAD_UDP_CKSUM | \ + DEV_TX_OFFLOAD_TCP_CKSUM) +#define MRVL_TX_OFFLOADS (MRVL_TX_OFFLOAD_CHECKSUM | \ DEV_TX_OFFLOAD_MULTI_SEGS) +#define MRVL_TX_PKT_OFFLOADS (PKT_TX_IP_CKSUM | \ + PKT_TX_TCP_CKSUM | \ + PKT_TX_UDP_CKSUM) + static const char * const valid_args[] = { MRVL_IFACE_NAME_ARG, MRVL_CFG_ARG, @@ -2481,8 +2486,6 @@ mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) * * @param ol_flags * Offload flags. - * @param packet_type - * Packet type bitfield. * @param l3_type * Pointer to the pp2_ouq_l3_type structure. * @param l4_type @@ -2491,12 +2494,9 @@ mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) * Will be set to 1 in case l3 checksum is computed. * @param l4_cksum * Will be set to 1 in case l4 checksum is computed. - * - * @return - * 0 on success, negative error value otherwise. */ -static inline int -mrvl_prepare_proto_info(uint64_t ol_flags, uint32_t packet_type, +static inline void +mrvl_prepare_proto_info(uint64_t ol_flags, enum pp2_outq_l3_type *l3_type, enum pp2_outq_l4_type *l4_type, int *gen_l3_cksum, @@ -2506,26 +2506,22 @@ mrvl_prepare_proto_info(uint64_t ol_flags, uint32_t packet_type, * Based on ol_flags prepare information * for pp2_ppio_outq_desc_set_proto_info() which setups descriptor * for offloading. + * in most of the checksum cases ipv4 must be set, so this is the + * default value */ - if (ol_flags & PKT_TX_IPV4) { - *l3_type = PP2_OUTQ_L3_TYPE_IPV4; - *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0; - } else if (ol_flags & PKT_TX_IPV6) { + *l3_type = PP2_OUTQ_L3_TYPE_IPV4; + *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0; + + if (ol_flags & PKT_TX_IPV6) { *l3_type = PP2_OUTQ_L3_TYPE_IPV6; /* no checksum for ipv6 header */ *gen_l3_cksum = 0; - } else { - /* if something different then stop processing */ - return -1; } - ol_flags &= PKT_TX_L4_MASK; - if ((packet_type & RTE_PTYPE_L4_TCP) && - ol_flags == PKT_TX_TCP_CKSUM) { + if ((ol_flags & PKT_TX_L4_MASK) == PKT_TX_TCP_CKSUM) { *l4_type = PP2_OUTQ_L4_TYPE_TCP; *gen_l4_cksum = 1; - } else if ((packet_type & RTE_PTYPE_L4_UDP) && - ol_flags == PKT_TX_UDP_CKSUM) { + } else if ((ol_flags & PKT_TX_L4_MASK) == PKT_TX_UDP_CKSUM) { *l4_type = PP2_OUTQ_L4_TYPE_UDP; *gen_l4_cksum = 1; } else { @@ -2533,8 +2529,6 @@ mrvl_prepare_proto_info(uint64_t ol_flags, uint32_t packet_type, /* no checksum for other type */ *gen_l4_cksum = 0; } - - return 0; } /** @@ -2635,7 +2629,7 @@ mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) struct pp2_hif *hif; struct pp2_ppio_desc descs[nb_pkts]; unsigned int core_id = rte_lcore_id(); - int i, ret, bytes_sent = 0; + int i, bytes_sent = 0; uint16_t num, sq_free_size; uint64_t addr; @@ -2675,11 +2669,10 @@ mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) * in case unsupported ol_flags were passed * do not update descriptor offload information */ - ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type, - &l3_type, &l4_type, &gen_l3_cksum, - &gen_l4_cksum); - if (unlikely(ret)) + if (!(mbuf->ol_flags & MRVL_TX_PKT_OFFLOADS)) continue; + mrvl_prepare_proto_info(mbuf->ol_flags, &l3_type, &l4_type, + &gen_l3_cksum, &gen_l4_cksum); pp2_ppio_outq_desc_set_proto_info(&descs[i], l3_type, l4_type, mbuf->l2_len, @@ -2729,7 +2722,7 @@ mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, struct pp2_ppio_sg_pkts pkts; uint8_t frags[nb_pkts]; unsigned int core_id = rte_lcore_id(); - int i, j, ret, bytes_sent = 0; + int i, j, bytes_sent = 0; int tail, tail_first; uint16_t num, sq_free_size; uint16_t nb_segs, total_descs = 0; @@ -2812,11 +2805,10 @@ mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, /* In case unsupported ol_flags were passed * do not update descriptor offload information */ - ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type, - &l3_type, &l4_type, &gen_l3_cksum, - &gen_l4_cksum); - if (unlikely(ret)) + if (!(mbuf->ol_flags & MRVL_TX_PKT_OFFLOADS)) continue; + mrvl_prepare_proto_info(mbuf->ol_flags, &l3_type, &l4_type, + &gen_l3_cksum, &gen_l4_cksum); pp2_ppio_outq_desc_set_proto_info(&descs[tail_first], l3_type, l4_type, mbuf->l2_len, -- 2.28.0