From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B6C5CA09E4; Thu, 28 Jan 2021 16:23:33 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2FFBB1889E0; Thu, 28 Jan 2021 16:23:33 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 8B77440395 for ; Thu, 28 Jan 2021 16:23:31 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 10SFJpb4014208 for ; Thu, 28 Jan 2021 07:23:30 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=icg0ydr4q4Xqjj3I9BC9mL2yPEwrYhYnTU6pvU/xnLA=; b=d4W15EuSZB8ODUvoMmdUwaXErRBOdMh1cEatTBKynlOgWu9kxYIDj+l93kPCOD9CZTFg zFrsQYyR8o6XAIqjwwHAacObOc/ULXY1d7hiDirda6EUAnl+w1J8P57YigLtbH3ZO9Ky aH5t7F5PqxmBoKn7XMfRlgNN5WCuRWc//JvCWDJySCOmhlXvB69seS4Q7E18Vztpmdmv Y80g1AdAZQjz79FtcldCN7jjOlYPYIgZP2nDALcHyi89hAOZecau41tPQOw7i/jDeXmB Y5KG7B/5r1PqYst+zmznL8ZBv9OE5+Av6yipaUCW2dDILZg+Nzp7oBFobHFgKEKSrZ/V bw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 368j1ufcnq-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 28 Jan 2021 07:23:30 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 28 Jan 2021 07:23:29 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 28 Jan 2021 07:23:29 -0800 Received: from sburla-Super-Server.caveonetworks.com (unknown [10.106.27.196]) by maili.marvell.com (Postfix) with ESMTP id 55D9B3F7043; Thu, 28 Jan 2021 07:23:29 -0800 (PST) From: Nalla Pradeep To: Jerin Jacob , Nithin Dabilpuram , Nalla Pradeep , "Radha Mohan Chintakuntla" , Veerasenareddy Burru CC: , Date: Thu, 28 Jan 2021 07:22:11 -0800 Message-ID: <20210128152220.214485-3-pnalla@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210118093602.5449-1-pnalla@marvell.com> References: <20210118093602.5449-1-pnalla@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737 definitions=2021-01-28_11:2021-01-28, 2021-01-28 signatures=0 Subject: [dpdk-dev] [PATCH v5 02/11] net/octeontx_ep: add ethdev probe and remove X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" add basic PCIe ethdev probe and remove. Signed-off-by: Nalla Pradeep --- drivers/common/octeontx2/otx2_common.h | 3 ++ drivers/net/octeontx_ep/meson.build | 2 + drivers/net/octeontx_ep/otx_ep_common.h | 14 ++++++ drivers/net/octeontx_ep/otx_ep_ethdev.c | 56 +++++++++++++++++++++++ drivers/net/octeontx_ep/otx_ep_vf.h | 9 ++++ drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 6 +-- 6 files changed, 87 insertions(+), 3 deletions(-) create mode 100644 drivers/net/octeontx_ep/otx_ep_common.h create mode 100644 drivers/net/octeontx_ep/otx_ep_vf.h diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h index b6779f710..96021eda2 100644 --- a/drivers/common/octeontx2/otx2_common.h +++ b/drivers/common/octeontx2/otx2_common.h @@ -137,6 +137,9 @@ extern int otx2_logtype_ree; #define PCI_DEVID_OCTEONTX2_RVU_AF_VF 0xA0f8 #define PCI_DEVID_OCTEONTX2_DPI_VF 0xA081 #define PCI_DEVID_OCTEONTX2_EP_VF 0xB203 /* OCTEON TX2 EP mode */ +/* OCTEON TX2 98xx EP mode */ +#define PCI_DEVID_CN98XX_EP_NET_VF 0xB103 +#define PCI_DEVID_OCTEONTX2_EP_RAW_VF 0xB204 /* OCTEON TX2 EP mode */ #define PCI_DEVID_OCTEONTX2_RVU_SDP_PF 0xA0f6 #define PCI_DEVID_OCTEONTX2_RVU_SDP_VF 0xA0f7 #define PCI_DEVID_OCTEONTX2_RVU_REE_PF 0xA0f4 diff --git a/drivers/net/octeontx_ep/meson.build b/drivers/net/octeontx_ep/meson.build index 2ef2222d2..73e04b0be 100644 --- a/drivers/net/octeontx_ep/meson.build +++ b/drivers/net/octeontx_ep/meson.build @@ -2,7 +2,9 @@ # Copyright(C) 2021 Marvell. # +deps += ['common_octeontx2'] sources = files( 'otx_ep_ethdev.c', ) +includes += include_directories('../../common/octeontx2') diff --git a/drivers/net/octeontx_ep/otx_ep_common.h b/drivers/net/octeontx_ep/otx_ep_common.h new file mode 100644 index 000000000..35ea99a79 --- /dev/null +++ b/drivers/net/octeontx_ep/otx_ep_common.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ +#ifndef _OTX_EP_COMMON_H_ +#define _OTX_EP_COMMON_H_ + +/* OTX_EP EP VF device data structure */ +struct otx_ep_device { + /* PCI device pointer */ + struct rte_pci_device *pdev; + + struct rte_eth_dev *eth_dev; +}; +#endif /* _OTX_EP_COMMON_H_ */ diff --git a/drivers/net/octeontx_ep/otx_ep_ethdev.c b/drivers/net/octeontx_ep/otx_ep_ethdev.c index 603023b0d..fc4356013 100644 --- a/drivers/net/octeontx_ep/otx_ep_ethdev.c +++ b/drivers/net/octeontx_ep/otx_ep_ethdev.c @@ -1,3 +1,59 @@ /* SPDX-License-Identifier: BSD-3-Clause * Copyright(C) 2021 Marvell. */ + +#include + +#include "otx2_common.h" +#include "otx_ep_common.h" +#include "otx_ep_vf.h" + +static int +otx_ep_eth_dev_uninit(struct rte_eth_dev *eth_dev) +{ + RTE_SET_USED(eth_dev); + + return -ENODEV; +} + +static int +otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev) +{ + RTE_SET_USED(eth_dev); + + return -ENODEV; +} + +static int +otx_ep_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, + struct rte_pci_device *pci_dev) +{ + return rte_eth_dev_pci_generic_probe(pci_dev, + sizeof(struct otx_ep_device), + otx_ep_eth_dev_init); +} + +static int +otx_ep_eth_dev_pci_remove(struct rte_pci_device *pci_dev) +{ + return rte_eth_dev_pci_generic_remove(pci_dev, + otx_ep_eth_dev_uninit); +} + +/* Set of PCI devices this driver supports */ +static const struct rte_pci_id pci_id_otx_ep_map[] = { + { RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX_EP_VF) }, + { RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN98XX_EP_NET_VF) }, + { .vendor_id = 0, /* sentinel */ } +}; + +static struct rte_pci_driver rte_otx_ep_pmd = { + .id_table = pci_id_otx_ep_map, + .drv_flags = RTE_PCI_DRV_NEED_MAPPING, + .probe = otx_ep_eth_dev_pci_probe, + .remove = otx_ep_eth_dev_pci_remove, +}; + +RTE_PMD_REGISTER_PCI(net_otx_ep, rte_otx_ep_pmd); +RTE_PMD_REGISTER_PCI_TABLE(net_otx_ep, pci_id_otx_ep_map); +RTE_PMD_REGISTER_KMOD_DEP(net_otx_ep, "* igb_uio | vfio-pci"); diff --git a/drivers/net/octeontx_ep/otx_ep_vf.h b/drivers/net/octeontx_ep/otx_ep_vf.h new file mode 100644 index 000000000..e88b40971 --- /dev/null +++ b/drivers/net/octeontx_ep/otx_ep_vf.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ +#ifndef _OTX_EP_VF_H_ +#define _OTX_EP_VF_H_ + +#define PCI_DEVID_OCTEONTX_EP_VF 0xa303 + +#endif /*_OTX_EP_VF_H_ */ diff --git a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c index 2b78a7941..b2ccdda83 100644 --- a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c +++ b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c @@ -22,7 +22,7 @@ static const struct rte_pci_id pci_sdp_vf_map[] = { { RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, - PCI_DEVID_OCTEONTX2_EP_VF) + PCI_DEVID_OCTEONTX2_EP_RAW_VF) }, { .vendor_id = 0, @@ -109,8 +109,8 @@ sdp_chip_specific_setup(struct sdp_device *sdpvf) int ret; switch (dev_id) { - case PCI_DEVID_OCTEONTX2_EP_VF: - sdpvf->chip_id = PCI_DEVID_OCTEONTX2_EP_VF; + case PCI_DEVID_OCTEONTX2_EP_RAW_VF: + sdpvf->chip_id = PCI_DEVID_OCTEONTX2_EP_RAW_VF; ret = sdp_vf_setup_device(sdpvf); break; -- 2.17.1