From: Rasesh Mody <rmody@marvell.com>
To: <jerinj@marvell.com>, <ferruh.yigit@intel.com>
Cc: Rasesh Mody <rmody@marvell.com>, <dev@dpdk.org>,
<GR-Everest-DPDK-Dev@marvell.com>,
Igor Russkikh <irusskikh@marvell.com>
Subject: [dpdk-dev] [PATCH 7/7] net/qede/base: clean unnecessary ifdef and comments
Date: Fri, 19 Feb 2021 02:14:22 -0800 [thread overview]
Message-ID: <20210219101422.19121-8-rmody@marvell.com> (raw)
In-Reply-To: <20210219101422.19121-1-rmody@marvell.com>
Removed #ifdef LINUX_REMOVE, #ifndef LINUX_REMOVE, TODO comments
and TBD comments. Lots of TODOs and TBDs are not relevant.
Signed-off-by: Rasesh Mody <rmody@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
---
drivers/net/qede/base/bcm_osal.c | 1 -
drivers/net/qede/base/bcm_osal.h | 3 --
drivers/net/qede/base/ecore.h | 5 ---
drivers/net/qede/base/ecore_chain.h | 1 -
drivers/net/qede/base/ecore_cxt.c | 7 ----
drivers/net/qede/base/ecore_cxt.h | 1 -
drivers/net/qede/base/ecore_dev.c | 43 +-------------------
drivers/net/qede/base/ecore_hsi_common.h | 1 -
drivers/net/qede/base/ecore_hsi_init_func.h | 2 -
drivers/net/qede/base/ecore_hw.c | 7 ----
drivers/net/qede/base/ecore_init_fw_funcs.c | 2 -
drivers/net/qede/base/ecore_int.c | 11 -----
drivers/net/qede/base/ecore_int.h | 1 -
drivers/net/qede/base/ecore_iov_api.h | 5 ---
drivers/net/qede/base/ecore_l2.c | 6 ---
drivers/net/qede/base/ecore_mcp.c | 20 ---------
drivers/net/qede/base/ecore_mcp.h | 1 -
drivers/net/qede/base/ecore_mcp_api.h | 4 --
drivers/net/qede/base/ecore_sp_commands.c | 3 --
drivers/net/qede/base/ecore_spq.c | 5 ---
drivers/net/qede/base/ecore_sriov.c | 45 +--------------------
drivers/net/qede/base/ecore_sriov.h | 1 -
drivers/net/qede/base/ecore_vf.c | 4 --
drivers/net/qede/base/ecore_vf.h | 3 --
drivers/net/qede/base/ecore_vf_api.h | 2 -
drivers/net/qede/base/ecore_vfpf_if.h | 9 +----
drivers/net/qede/base/mcp_public.h | 2 -
drivers/net/qede/qede_ethdev.c | 1 -
drivers/net/qede/qede_main.c | 1 -
drivers/net/qede/qede_rxtx.c | 5 ---
drivers/net/qede/qede_sriov.c | 4 --
31 files changed, 6 insertions(+), 200 deletions(-)
diff --git a/drivers/net/qede/base/bcm_osal.c b/drivers/net/qede/base/bcm_osal.c
index 23a84795f..8e4fe6926 100644
--- a/drivers/net/qede/base/bcm_osal.c
+++ b/drivers/net/qede/base/bcm_osal.c
@@ -121,7 +121,6 @@ void qede_vf_fill_driver_data(struct ecore_hwfn *hwfn,
struct ecore_vf_acquire_sw_info *vf_sw_info)
{
vf_sw_info->os_type = VFPF_ACQUIRE_OS_LINUX_USERSPACE;
- /* TODO - fill driver version */
}
void *osal_dma_alloc_coherent(struct ecore_dev *p_dev,
diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h
index 38b7fff67..315d091e1 100644
--- a/drivers/net/qede/base/bcm_osal.h
+++ b/drivers/net/qede/base/bcm_osal.h
@@ -270,7 +270,6 @@ typedef struct osal_list_t {
#define OSAL_LIST_NEXT(entry, field, type) \
(type *)((&((entry)->field))->next)
-/* TODO: Check field, type order */
#define OSAL_LIST_FOR_EACH_ENTRY(entry, list, field, type) \
for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field); \
@@ -284,7 +283,6 @@ typedef struct osal_list_t {
entry = (type *)tmp_entry, \
tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL)
-/* TODO: OSAL_LIST_INSERT_ENTRY_AFTER */
#define OSAL_LIST_INSERT_ENTRY_AFTER(new_entry, entry, list) \
OSAL_LIST_PUSH_HEAD(new_entry, list)
@@ -396,7 +394,6 @@ void qede_hw_err_notify(struct ecore_hwfn *p_hwfn,
#define OSAL_UNZIP_DATA(p_hwfn, input_len, buf, max_size, unzip_buf) \
qede_unzip_data(p_hwfn, input_len, buf, max_size, unzip_buf)
-/* TODO: */
#define OSAL_SCHEDULE_RECOVERY_HANDLER(hwfn) nothing
int qede_save_fw_dump(uint16_t port_id);
diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index 9801d5348..0c75934d2 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -170,7 +170,6 @@ static OSAL_INLINE u32 DB_ADDR_VF_E5(u32 cid, u32 DEMS)
((sizeof(type_name) + (u32)(1 << (p_hwfn->p_dev->cache_shift)) - 1) & \
~((1 << (p_hwfn->p_dev->cache_shift)) - 1))
-#ifndef LINUX_REMOVE
#ifndef U64_HI
#define U64_HI(val) ((u32)(((u64)(val)) >> 32))
#endif
@@ -178,7 +177,6 @@ static OSAL_INLINE u32 DB_ADDR_VF_E5(u32 cid, u32 DEMS)
#ifndef U64_LO
#define U64_LO(val) ((u32)(((u64)(val)) & 0xffffffff))
#endif
-#endif
#ifndef __EXTRACT__LINUX__IF__
#define ECORE_INT_DEBUG_SIZE_DEF _MB(2)
@@ -271,7 +269,6 @@ enum DP_LEVEL {
#define ECORE_LOG_NOTICE_MASK (0x80000000)
enum DP_MODULE {
-#ifndef LINUX_REMOVE
ECORE_MSG_DRV = 0x0001,
ECORE_MSG_PROBE = 0x0002,
ECORE_MSG_LINK = 0x0004,
@@ -287,7 +284,6 @@ enum DP_MODULE {
ECORE_MSG_PKTDATA = 0x1000,
ECORE_MSG_HW = 0x2000,
ECORE_MSG_WOL = 0x4000,
-#endif
ECORE_MSG_SPQ = 0x10000,
ECORE_MSG_STATS = 0x20000,
ECORE_MSG_DCB = 0x40000,
@@ -761,7 +757,6 @@ enum ecore_mf_mode_bit {
/* Allow Cross-PF [& child VFs] Tx-switching */
ECORE_MF_INTER_PF_SWITCH,
- /* TODO - if we ever re-utilize any of this logic, we can rename */
ECORE_MF_UFP_SPECIFIC,
ECORE_MF_DISABLE_ARFS,
diff --git a/drivers/net/qede/base/ecore_chain.h b/drivers/net/qede/base/ecore_chain.h
index 8c7971081..78a10ce34 100644
--- a/drivers/net/qede/base/ecore_chain.h
+++ b/drivers/net/qede/base/ecore_chain.h
@@ -145,7 +145,6 @@ struct ecore_chain {
u8 intended_use;
- /* TBD - do we really need this? Couldn't find usage for it */
bool b_external_pbl;
void *dp_ctx;
diff --git a/drivers/net/qede/base/ecore_cxt.c b/drivers/net/qede/base/ecore_cxt.c
index c22f97f7d..74cf77255 100644
--- a/drivers/net/qede/base/ecore_cxt.c
+++ b/drivers/net/qede/base/ecore_cxt.c
@@ -430,7 +430,6 @@ static void ecore_ilt_get_dynamic_line_range(struct ecore_hwfn *p_hwfn,
struct ecore_conn_type_cfg *p_cfg;
u32 cxts_per_p;
- /* TBD MK: ILT code should be simplified once PROTO enum is changed */
*dynamic_line_offset = 0;
*dynamic_line_cnt = 0;
@@ -2034,7 +2033,6 @@ static void ecore_tm_init_pf(struct ecore_hwfn *p_hwfn)
OSAL_MEM_ZERO(&tm_iids, sizeof(tm_iids));
ecore_cxt_tm_iids(p_hwfn, &tm_iids);
- /* @@@TBD No pre-scan for now */
cfg_word = 0;
SET_FIELD(cfg_word, TM_CFG_NUM_IDS, tm_iids.per_vf_cids);
@@ -2521,11 +2519,6 @@ ecore_cxt_dynamic_ilt_alloc(struct ecore_hwfn *p_hwfn,
enum ecore_cxt_elem_type elem_type,
u32 iid, u8 vf_id)
{
- /* TODO
- * Check to see if we need to do anything differeny if this is
- * called on behalf of VF.
- */
-
u32 reg_offset, shadow_line, elem_size, hw_p_size, elems_per_p, line;
struct ecore_ilt_client_cfg *p_cli;
struct ecore_ilt_cli_blk *p_blk;
diff --git a/drivers/net/qede/base/ecore_cxt.h b/drivers/net/qede/base/ecore_cxt.h
index fe61a8b8f..11cecb4c6 100644
--- a/drivers/net/qede/base/ecore_cxt.h
+++ b/drivers/net/qede/base/ecore_cxt.h
@@ -368,7 +368,6 @@ struct ecore_cxt_mngr {
/* Maximal number of L2 steering filters */
u32 arfs_count;
- /* TODO - VF arfs filters ? */
u16 iscsi_task_pages;
u16 fcoe_task_pages;
diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
index 93af8c897..08e165b07 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -36,13 +36,6 @@
#pragma warning(disable : 28123)
#endif
-/* TODO - there's a bug in DCBx re-configuration flows in MF, as the QM
- * registers involved are not split and thus configuration is a race where
- * some of the PFs configuration might be lost.
- * Eventually, this needs to move into a MFW-covered HW-lock as arbitration
- * mechanism as this doesn't cover some cases [E.g., PDA or scenarios where
- * there's more than a single compiled ecore component in system].
- */
static osal_spinlock_t qm_lock;
static u32 qm_lock_ref_cnt;
@@ -854,10 +847,6 @@ enum ecore_eng ecore_llh_get_l2_affinity_hint(struct ecore_dev *p_dev)
return p_dev->l2_affin_hint ? ECORE_ENG1 : ECORE_ENG0;
}
-/* TBD -
- * When the relevant definitions are available in reg_addr.h, the SHIFT
- * definitions should be removed, and the MASK definitions should be revised.
- */
#define NIG_REG_PPF_TO_ENGINE_SEL_ROCE_MASK 0x3
#define NIG_REG_PPF_TO_ENGINE_SEL_ROCE_SHIFT 0
#define NIG_REG_PPF_TO_ENGINE_SEL_NON_ROCE_MASK 0x3
@@ -1882,7 +1871,6 @@ void ecore_resc_free(struct ecore_dev *p_dev)
ecore_dcbx_info_free(p_hwfn);
ecore_dbg_user_data_free(p_hwfn);
ecore_fw_overlay_mem_free(p_hwfn, &p_hwfn->fw_overlay_mem);
- /* @@@TBD Flush work-queue ?*/
/* destroy doorbell recovery mechanism */
ecore_db_recovery_teardown(p_hwfn);
@@ -3132,9 +3120,7 @@ static enum _ecore_status_t ecore_lag_create_slave(struct ecore_hwfn *p_hwfn,
u8 master_pfid)
{
struct ecore_ptt *p_ptt = ecore_ptt_acquire(p_hwfn);
- u8 slave_ppfid = 1; /* TODO: Need some sort of resource management function
- * to return a free entry
- */
+ u8 slave_ppfid = 1;
enum _ecore_status_t rc;
if (!p_ptt)
@@ -3251,7 +3237,6 @@ enum _ecore_status_t ecore_lag_create(struct ecore_dev *dev,
return ECORE_INVAL;
}
- /* TODO: Check Supported MFW */
p_hwfn->lag_info.lag_type = lag_type;
p_hwfn->lag_info.link_change_cb = link_change_cb;
p_hwfn->lag_info.cxt = cxt;
@@ -3860,10 +3845,7 @@ static enum _ecore_status_t ecore_hw_init_chip(struct ecore_dev *p_dev,
}
#endif
-/* Init run time data for all PFs and their VFs on an engine.
- * TBD - for VFs - Once we have parent PF info for each VF in
- * shmem available as CAU requires knowledge of parent PF for each VF.
- */
+/* Init run time data for all PFs and their VFs on an engine. */
static void ecore_init_cau_rt_data(struct ecore_dev *p_dev)
{
u32 offset = CAU_REG_SB_VAR_MEMORY_RT_OFFSET;
@@ -3998,9 +3980,6 @@ static enum _ecore_status_t ecore_hw_init_common(struct ecore_hwfn *p_hwfn,
if (rc != ECORE_SUCCESS)
return rc;
- /* @@TBD MichalK - should add VALIDATE_VFID to init tool...
- * need to decide with which value, maybe runtime
- */
ecore_wr(p_hwfn, p_ptt, PSWRQ2_REG_L2P_VALIDATE_VFID, 0);
ecore_wr(p_hwfn, p_ptt, PGLUE_B_REG_USE_CLIENTID_IN_TAG, 1);
@@ -4762,7 +4741,6 @@ ecore_hw_init_pf(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
NIG_REG_LLH_FUNC_TAGMAC_CLS_TYPE_RT_OFFSET, 1);
}
- /* Protocl Configuration - @@@TBD - should we set 0 otherwise?*/
STORE_RT_REG(p_hwfn, PRS_REG_SEARCH_TCP_RT_OFFSET,
(p_hwfn->hw_info.personality == ECORE_PCI_ISCSI) ? 1 : 0);
STORE_RT_REG(p_hwfn, PRS_REG_SEARCH_FCOE_RT_OFFSET,
@@ -5469,12 +5447,9 @@ enum _ecore_status_t ecore_hw_stop(struct ecore_dev *p_dev)
ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_ROCE, 0x0);
ecore_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_OPENFLOW, 0x0);
- /* @@@TBD - clean transmission queues (5.b) */
- /* @@@TBD - clean BTB (5.c) */
ecore_hw_timers_stop(p_dev, p_hwfn, p_ptt);
- /* @@@TBD - verify DMAE requests are done (8) */
/* Disable Attention Generation */
ecore_int_igu_disable_int(p_hwfn, p_ptt);
@@ -5496,7 +5471,6 @@ enum _ecore_status_t ecore_hw_stop(struct ecore_dev *p_dev)
QM_REG_USG_CNT_PF_TX, 0);
ecore_verify_reg_val(p_hwfn, p_ptt,
QM_REG_USG_CNT_PF_OTHER, 0);
- /* @@@TBD - assert on incorrect xCFC values (10.b) */
}
/* Disable PF in HW blocks */
@@ -5573,10 +5547,7 @@ enum _ecore_status_t ecore_hw_stop_fastpath(struct ecore_dev *p_dev)
ecore_wr(p_hwfn, p_ptt,
NIG_REG_RX_LLH_BRB_GATE_DNTFWD_PERPF, 0x1);
- /* @@@TBD - clean transmission queues (5.b) */
- /* @@@TBD - clean BTB (5.c) */
- /* @@@TBD - verify DMAE requests are done (8) */
ecore_int_igu_init_pure_rt(p_hwfn, p_ptt, false, false);
/* Need to wait 1ms to guarantee SBs are cleared */
@@ -6159,7 +6130,6 @@ __ecore_hw_set_resc_info(struct ecore_hwfn *p_hwfn, enum ecore_resources res_id,
return rc;
}
- /* TODO: Add MFW support for GFS profiles resource */
if (res_id == ECORE_GFS_PROFILE) {
DP_INFO(p_hwfn,
"Resource %d [%s]: Applying default values [%d,%d]\n",
@@ -6557,7 +6527,6 @@ ecore_hw_get_nvm_info(struct ecore_hwfn *p_hwfn,
return ECORE_INVAL;
}
- /* Read nvm_cfg1 (Notice this is just offset, and not offsize (TBD) */
nvm_cfg1_offset = ecore_rd(p_hwfn, p_ptt, nvm_cfg_addr + 4);
addr = MCP_REG_SCRATCH + nvm_cfg1_offset +
@@ -8178,11 +8147,6 @@ enum _ecore_status_t ecore_set_queue_coalesce(struct ecore_hwfn *p_hwfn,
enum _ecore_status_t rc = ECORE_SUCCESS;
struct ecore_ptt *p_ptt;
- /* TODO - Configuring a single queue's coalescing but
- * claiming all queues are abiding same configuration
- * for PF and VF both.
- */
-
if (IS_VF(p_hwfn->p_dev))
return ecore_vf_pf_set_coalesce(p_hwfn, rx_coal,
tx_coal, p_cid);
@@ -8376,7 +8340,6 @@ static enum _ecore_status_t ecore_init_wfq_param(struct ecore_hwfn *p_hwfn,
return ECORE_INVAL;
}
- /* TBD - for number of vports greater than 100 */
if (num_vports > ECORE_WFQ_UNIT) {
DP_ERR(p_hwfn, "Number of vports is greater than %d\n",
ECORE_WFQ_UNIT);
@@ -8487,7 +8450,6 @@ int ecore_configure_vport_wfq(struct ecore_dev *p_dev, u16 vp_id, u32 rate)
{
int i, rc = ECORE_INVAL;
- /* TBD - for multiple hardware functions - that is 100 gig */
if (ECORE_IS_CMT(p_dev)) {
DP_NOTICE(p_dev, false,
"WFQ configuration is not supported for this device\n");
@@ -8522,7 +8484,6 @@ void ecore_configure_vp_wfq_on_link_change(struct ecore_dev *p_dev,
{
int i;
- /* TBD - for multiple hardware functions - that is 100 gig */
if (ECORE_IS_CMT(p_dev)) {
DP_ERR(p_dev,
"WFQ configuration is not supported for this device\n");
diff --git a/drivers/net/qede/base/ecore_hsi_common.h b/drivers/net/qede/base/ecore_hsi_common.h
index 80812d4ce..4533e96a0 100644
--- a/drivers/net/qede/base/ecore_hsi_common.h
+++ b/drivers/net/qede/base/ecore_hsi_common.h
@@ -3049,7 +3049,6 @@ struct sdm_agg_int_comp_params {
/* 1 - set a bit in aggregated vector, 0 - dont set */
#define SDM_AGG_INT_COMP_PARAMS_AGG_VECTOR_ENABLE_MASK 0x1
#define SDM_AGG_INT_COMP_PARAMS_AGG_VECTOR_ENABLE_SHIFT 6
-/* Number of bit in the aggregated vector, 0-279 (TBD) */
#define SDM_AGG_INT_COMP_PARAMS_AGG_VECTOR_BIT_MASK 0x1FF
#define SDM_AGG_INT_COMP_PARAMS_AGG_VECTOR_BIT_SHIFT 7
};
diff --git a/drivers/net/qede/base/ecore_hsi_init_func.h b/drivers/net/qede/base/ecore_hsi_init_func.h
index 93b24b729..b972388db 100644
--- a/drivers/net/qede/base/ecore_hsi_init_func.h
+++ b/drivers/net/qede/base/ecore_hsi_init_func.h
@@ -14,9 +14,7 @@
#define NUM_OF_VLAN_PRIORITIES 8
/* Size of CRC8 lookup table */
-#ifndef LINUX_REMOVE
#define CRC8_TABLE_SIZE 256
-#endif
/*
* GFS context Descriptot QREG (0)
diff --git a/drivers/net/qede/base/ecore_hw.c b/drivers/net/qede/base/ecore_hw.c
index e4f9b5e85..00b496416 100644
--- a/drivers/net/qede/base/ecore_hw.c
+++ b/drivers/net/qede/base/ecore_hw.c
@@ -158,7 +158,6 @@ void ecore_ptt_release(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt)
{
/* This PTT should not be set to pretend if it is being released */
- /* TODO - add some pretend sanity checks, to make sure pretend isn't set on this ptt */
OSAL_SPIN_LOCK(&p_hwfn->p_ptt_pool->lock);
OSAL_LIST_PUSH_HEAD(&p_ptt->list_entry, &p_hwfn->p_ptt_pool->free_list);
@@ -543,7 +542,6 @@ static void ecore_dmae_opcode(struct ecore_hwfn *p_hwfn,
p_params->dst_pf_id : p_hwfn->rel_pf_id;
SET_FIELD(opcode, DMAE_CMD_DST_PF_ID, dst_pf_id);
- /* DMAE_E4_TODO need to check which value to specify here. */
/* SET_FIELD(opcode, DMAE_CMD_C_DST, !b_complete_to_host);*/
/* Whether to write a completion word to the completion destination:
@@ -747,10 +745,6 @@ ecore_dmae_operation_wait(struct ecore_hwfn *p_hwfn)
wait_cnt_limit *= factor;
#endif
- /* DMAE_E4_TODO : TODO check if we have to call any other function
- * other than BARRIER to sync the completion_word since we are not
- * using the volatile keyword for this
- */
OSAL_BARRIER(p_hwfn->p_dev);
while (*p_hwfn->dmae_info.p_completion_word != DMAE_COMPLETION_VAL) {
OSAL_UDELAY(DMAE_MIN_WAIT_TIME);
@@ -842,7 +836,6 @@ static enum _ecore_status_t ecore_dmae_execute_sub_operation(struct ecore_hwfn *
ecore_status = ecore_dmae_operation_wait(p_hwfn);
#ifndef __EXTRACT__LINUX__
- /* TODO - is it true ? */
if (src_type == ECORE_DMAE_ADDRESS_HOST_VIRT ||
src_type == ECORE_DMAE_ADDRESS_HOST_PHYS)
OSAL_DMA_SYNC(p_hwfn->p_dev,
diff --git a/drivers/net/qede/base/ecore_init_fw_funcs.c b/drivers/net/qede/base/ecore_init_fw_funcs.c
index 575ba8070..ba23e2c4e 100644
--- a/drivers/net/qede/base/ecore_init_fw_funcs.c
+++ b/drivers/net/qede/base/ecore_init_fw_funcs.c
@@ -1873,9 +1873,7 @@ u32 ecore_get_mstorm_eth_vf_prods_offset(struct ecore_hwfn *p_hwfn, u8 vf_id, u8
return offset;
}
-#ifndef LINUX_REMOVE
#define CRC8_INIT_VALUE 0xFF
-#endif
static u8 cdu_crc8_table[CRC8_TABLE_SIZE];
/* Calculate and return CDU validation byte per connection type/region/cid */
diff --git a/drivers/net/qede/base/ecore_int.c b/drivers/net/qede/base/ecore_int.c
index e56d5dba7..4d3d0ac6e 100644
--- a/drivers/net/qede/base/ecore_int.c
+++ b/drivers/net/qede/base/ecore_int.c
@@ -195,9 +195,6 @@ static enum _ecore_status_t ecore_pswhst_attn_cb(struct ecore_hwfn *p_hwfn)
data);
}
- /* TODO - We know 'some' of these are legal due to virtualization,
- * but is it true for all of them?
- */
return ECORE_SUCCESS;
}
@@ -1746,7 +1743,6 @@ static void _ecore_int_cau_conf_pi(struct ecore_hwfn *p_hwfn,
u32 sb_offset, pi_offset;
if (IS_VF(p_hwfn->p_dev))
- return;/* @@@TBD MichalK- VF CAU... */
sb_offset = igu_sb_id * (ECORE_IS_E4(p_hwfn->p_dev) ? PIS_PER_SB_E4
: PIS_PER_SB_E5);
@@ -2401,7 +2397,6 @@ void ecore_int_igu_init_pure_rt(struct ecore_hwfn *p_hwfn,
u16 igu_sb_id = 0;
u32 val = 0;
- /* @@@TBD MichalK temporary... should be moved to init-tool... */
val = ecore_rd(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION);
val |= IGU_REG_BLOCK_CONFIGURATION_VF_CLEANUP_EN;
val &= ~IGU_REG_BLOCK_CONFIGURATION_PXP_TPH_INTERFACE_EN;
@@ -2459,7 +2454,6 @@ int ecore_int_igu_reset_cam(struct ecore_hwfn *p_hwfn,
p_info->usage.cnt = RESC_NUM(p_hwfn, ECORE_SB) - 1;
}
- /* TODO - how do we learn about VF SBs from MFW? */
if (IS_PF_SRIOV(p_hwfn)) {
u16 vfs = p_hwfn->p_dev->p_iov_info->total_vfs;
@@ -2586,7 +2580,6 @@ int ecore_int_igu_reset_cam_default(struct ecore_hwfn *p_hwfn,
p_cnt->orig = 0;
p_cnt->iov_orig = 0;
- /* TODO - we probably need to re-configure the CAU as well... */
return ecore_int_igu_reset_cam(p_hwfn, p_ptt);
}
@@ -2789,10 +2782,6 @@ ecore_int_igu_relocate_sb(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
p_info->usage.iov_cnt++;
p_info->usage.free_cnt_iov++;
- /* TODO - if SBs aren't really the limiting factor,
- * then it might not be accurate [in the since that
- * we might not need decrement the feature].
- */
p_hwfn->hw_info.feat_num[ECORE_PF_L2_QUE]--;
p_hwfn->hw_info.feat_num[ECORE_VF_L2_QUE]++;
} else {
diff --git a/drivers/net/qede/base/ecore_int.h b/drivers/net/qede/base/ecore_int.h
index 6d72d5ced..24bbaab75 100644
--- a/drivers/net/qede/base/ecore_int.h
+++ b/drivers/net/qede/base/ecore_int.h
@@ -92,7 +92,6 @@ u16 ecore_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id);
struct ecore_igu_block *
ecore_get_igu_free_sb(struct ecore_hwfn *p_hwfn, bool b_is_pf);
-/* TODO Names of function may change... */
void ecore_int_igu_init_pure_rt(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt,
bool b_set,
diff --git a/drivers/net/qede/base/ecore_iov_api.h b/drivers/net/qede/base/ecore_iov_api.h
index 329b30b7b..422de71c7 100644
--- a/drivers/net/qede/base/ecore_iov_api.h
+++ b/drivers/net/qede/base/ecore_iov_api.h
@@ -35,9 +35,7 @@
#define IS_PF_SRIOV(p_hwfn) (0)
#endif
#define IS_PF_SRIOV_ALLOC(p_hwfn) (!!((p_hwfn)->pf_iov_info))
-#define IS_PF_PDA(p_hwfn) 0 /* @@TBD Michalk */
-/* @@@ TBD MichalK - what should this number be*/
#define ECORE_MAX_QUEUE_VF_CHAINS_PER_PF 16
#define ECORE_MAX_CNQ_VF_CHAINS_PER_PF 16
#define ECORE_MAX_VF_CHAINS_PER_PF \
@@ -108,7 +106,6 @@ struct ecore_iov_vf_init_params {
/* Number of requested Queues; Currently, don't support different
* number of Rx/Tx queues.
*/
- /* TODO - remove this limitation */
u8 num_queues;
u8 num_cnqs;
@@ -210,7 +207,6 @@ enum _ecore_status_t ecore_iov_pci_enable_prolog(struct ecore_hwfn *p_hwfn,
enum _ecore_status_t ecore_iov_pci_disable_epilog(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt);
-#ifndef LINUX_REMOVE
/**
* @brief mark/clear all VFs before/after an incoming PCIe sriov
* disable.
@@ -357,7 +353,6 @@ void ecore_iov_get_link(struct ecore_hwfn *p_hwfn,
*/
bool ecore_iov_is_vf_pending_flr(struct ecore_hwfn *p_hwfn,
u16 rel_vf_id);
-#endif
/**
* @brief Check if given VF ID @vfid is valid
diff --git a/drivers/net/qede/base/ecore_l2.c b/drivers/net/qede/base/ecore_l2.c
index 646cf07cb..ac3d0f44d 100644
--- a/drivers/net/qede/base/ecore_l2.c
+++ b/drivers/net/qede/base/ecore_l2.c
@@ -133,7 +133,6 @@ void ecore_l2_free(struct ecore_hwfn *p_hwfn)
p_hwfn->p_l2_info = OSAL_NULL;
}
-/* TODO - we'll need locking around these... */
static bool ecore_eth_queue_qid_usage_add(struct ecore_hwfn *p_hwfn,
struct ecore_queue_cid *p_cid)
{
@@ -1268,11 +1267,6 @@ ecore_eth_pf_tx_queue_start(struct ecore_hwfn *p_hwfn,
enum _ecore_status_t rc;
u16 pq_id;
- /* TODO - set tc in the pq_params for multi-cos.
- * If pacing is enabled then select queue according to
- * rate limiter availability otherwise select queue based
- * on multi cos.
- */
if (IS_ECORE_PACING(p_hwfn))
pq_id = ecore_get_cm_pq_idx_rl(p_hwfn, p_cid->rel.queue_id);
else
diff --git a/drivers/net/qede/base/ecore_mcp.c b/drivers/net/qede/base/ecore_mcp.c
index 2e945556c..eda95dba7 100644
--- a/drivers/net/qede/base/ecore_mcp.c
+++ b/drivers/net/qede/base/ecore_mcp.c
@@ -263,14 +263,6 @@ enum _ecore_status_t ecore_load_mcp_offsets(struct ecore_hwfn *p_hwfn,
OFFSETOF(struct public_mfw_mb,
sup_msgs));
- /* @@@TBD:
- * The driver can notify that there was an MCP reset, and might read the
- * SHMEM values before the MFW has completed initializing them.
- * As a temporary solution, the "sup_msgs" field in the MFW mailbox is
- * used as a data ready indication.
- * This should be replaced with an actual indication when it is provided
- * by the MFW.
- */
if (!p_info->recovery_mode) {
while (!p_info->mfw_mb_length && --cnt) {
OSAL_MSLEEP(msec);
@@ -1551,12 +1543,6 @@ static void ecore_read_pf_bandwidth(struct ecore_hwfn *p_hwfn,
p_info = &p_hwfn->mcp_info->func_info;
- /* TODO - bandwidth min/max should have valid values of 1-100,
- * as well as some indication that the feature is disabled.
- * Until MFW/qlediag enforce those limitations, Assume THERE IS ALWAYS
- * limit and correct value to min `1' and max `100' if limit isn't in
- * range.
- */
p_info->bandwidth_min = GET_MFW_FIELD(p_shmem_info->config,
FUNC_MF_CFG_MIN_BW);
if (p_info->bandwidth_min < 1 || p_info->bandwidth_min > 100) {
@@ -1918,7 +1904,6 @@ u32 ecore_get_process_kill_counter(struct ecore_hwfn *p_hwfn,
{
u32 path_offsize_addr, path_offsize, path_addr, proc_kill_cnt;
- /* TODO - Add support for VFs */
if (IS_VF(p_hwfn->p_dev))
return ECORE_INVAL;
@@ -2928,7 +2913,6 @@ enum _ecore_status_t ecore_mcp_get_media_type(struct ecore_hwfn *p_hwfn,
{
*p_media_type = MEDIA_UNSPECIFIED;
- /* TODO - Add support for VFs */
if (IS_VF(p_hwfn->p_dev))
return ECORE_INVAL;
@@ -2968,7 +2952,6 @@ enum _ecore_status_t ecore_mcp_get_transceiver_data(struct ecore_hwfn *p_hwfn,
*p_transceiver_type = ETH_TRANSCEIVER_TYPE_NONE;
*p_transceiver_state = ETH_TRANSCEIVER_STATE_UPDATING;
- /* TODO - Add support for VFs */
if (IS_VF(p_hwfn->p_dev))
return ECORE_INVAL;
@@ -3144,7 +3127,6 @@ enum _ecore_status_t ecore_mcp_get_board_config(struct ecore_hwfn *p_hwfn,
{
u32 nvm_cfg_addr, nvm_cfg1_offset, port_cfg_addr;
- /* TODO - Add support for VFs */
if (IS_VF(p_hwfn->p_dev))
return ECORE_INVAL;
@@ -3306,11 +3288,9 @@ enum _ecore_status_t ecore_mcp_fill_shmem_func_info(struct ecore_hwfn *p_hwfn,
OSAL_MEMCPY(p_hwfn->p_dev->wol_mac, info->mac, ECORE_ETH_ALEN);
} else {
- /* TODO - are there protocols for which there's no MAC? */
DP_NOTICE(p_hwfn, false, "MAC is 0 in shmem\n");
}
- /* TODO - are these calculations true for BE machine? */
info->wwn_port = (u64)shmem_info.fcoe_wwn_port_name_lower |
(((u64)shmem_info.fcoe_wwn_port_name_upper) << 32);
info->wwn_node = (u64)shmem_info.fcoe_wwn_node_name_lower |
diff --git a/drivers/net/qede/base/ecore_mcp.h b/drivers/net/qede/base/ecore_mcp.h
index 81d3dc04a..60e2b8307 100644
--- a/drivers/net/qede/base/ecore_mcp.h
+++ b/drivers/net/qede/base/ecore_mcp.h
@@ -15,7 +15,6 @@
/* Using hwfn number (and not pf_num) is required since in CMT mode,
* same pf_num may be used by two different hwfn
- * TODO - this shouldn't really be in .h file, but until all fields
* required during hw-init will be placed in their correct place in shmem
* we need it in ecore_dev.c [for readin the nvram reflection in shmem].
*/
diff --git a/drivers/net/qede/base/ecore_mcp_api.h b/drivers/net/qede/base/ecore_mcp_api.h
index 800a23fb1..3c5d8b2aa 100644
--- a/drivers/net/qede/base/ecore_mcp_api.h
+++ b/drivers/net/qede/base/ecore_mcp_api.h
@@ -787,7 +787,6 @@ enum _ecore_status_t ecore_mcp_cmd(struct ecore_hwfn *p_hwfn,
enum _ecore_status_t ecore_mcp_drain(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt);
-#ifndef LINUX_REMOVE
/**
* @brief - return the mcp function info of the hw function
*
@@ -797,9 +796,7 @@ enum _ecore_status_t ecore_mcp_drain(struct ecore_hwfn *p_hwfn,
*/
const struct ecore_mcp_function_info
*ecore_mcp_get_function_info(struct ecore_hwfn *p_hwfn);
-#endif
-#ifndef LINUX_REMOVE
/**
* @brief - count number of function with a matching personality on engine.
*
@@ -813,7 +810,6 @@ const struct ecore_mcp_function_info
int ecore_mcp_get_personality_cnt(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt,
u32 personalities);
-#endif
/**
* @brief Get the flash size value
diff --git a/drivers/net/qede/base/ecore_sp_commands.c b/drivers/net/qede/base/ecore_sp_commands.c
index 3a507843a..3ba6d3f19 100644
--- a/drivers/net/qede/base/ecore_sp_commands.c
+++ b/drivers/net/qede/base/ecore_sp_commands.c
@@ -413,9 +413,6 @@ enum _ecore_status_t ecore_sp_pf_start(struct ecore_hwfn *p_hwfn,
p_ramrod->base_vf_id = (u8)p_iov->first_vf_in_pf;
p_ramrod->num_vfs = (u8)p_iov->total_vfs;
}
- /* @@@TBD - update also the "ROCE_VER_KEY" entries when the FW RoCE HSI
- * version is available.
- */
p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MINOR;
diff --git a/drivers/net/qede/base/ecore_spq.c b/drivers/net/qede/base/ecore_spq.c
index dda36c995..08ecb7979 100644
--- a/drivers/net/qede/base/ecore_spq.c
+++ b/drivers/net/qede/base/ecore_spq.c
@@ -262,7 +262,6 @@ static void ecore_spq_hw_initialize(struct ecore_hwfn *p_hwfn,
&p_cxt_e5->xstorm_st_context.consolid_base_addr;
}
- /* @@@TBD we zero the context until we have ilt_reset implemented. */
OSAL_MEM_ZERO(p_cxt, core_conn_context_size);
SET_FIELD(*p_flags10, XSTORM_CORE_CONN_AG_CTX_DQ_CF_EN, 1);
@@ -858,10 +857,6 @@ static enum _ecore_status_t ecore_spq_post_list(struct ecore_hwfn *p_hwfn,
struct ecore_spq *p_spq = p_hwfn->p_spq;
enum _ecore_status_t rc;
- /* TODO - implementation might be wasteful; will always keep room
- * for an additional high priority ramrod (even if one is already
- * pending FW)
- */
while (ecore_chain_get_elem_left(&p_spq->chain) > keep_reserve &&
!OSAL_LIST_IS_EMPTY(head)) {
struct ecore_spq_entry *p_ent =
diff --git a/drivers/net/qede/base/ecore_sriov.c b/drivers/net/qede/base/ecore_sriov.c
index 0d768c525..8d62d52a8 100644
--- a/drivers/net/qede/base/ecore_sriov.c
+++ b/drivers/net/qede/base/ecore_sriov.c
@@ -432,7 +432,6 @@ ecore_iov_post_vf_bulletin(struct ecore_hwfn *p_hwfn, int vfid,
if (!p_vf)
return ECORE_INVAL;
- /* TODO - check VF is in a state where it can accept message */
if (!p_vf->vf_bulletin)
return ECORE_INVAL;
@@ -475,9 +474,6 @@ static enum _ecore_status_t ecore_iov_pci_cfg_info(struct ecore_dev *p_dev)
OSAL_PCI_READ_CONFIG_WORD(p_dev, pos + RTE_PCI_SRIOV_NUM_VF, &iov->num_vfs);
if (iov->num_vfs) {
- /* @@@TODO - in future we might want to add an OSAL here to
- * allow each OS to decide on its own how to act.
- */
DP_VERBOSE(p_dev, ECORE_MSG_IOV,
"Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
iov->num_vfs = 0;
@@ -571,7 +567,6 @@ static void ecore_iov_setup_vfdb(struct ecore_hwfn *p_hwfn)
vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
concrete = ecore_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
vf->concrete_fid = concrete;
- /* TODO - need to devise a better way of getting opaque */
vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
(vf->abs_vf_id << 8);
@@ -770,7 +765,6 @@ enum _ecore_status_t ecore_iov_hw_info(struct ecore_hwfn *p_hwfn)
}
/* Allocate a new struct for IOV information */
- /* TODO - can change to VALLOC when its available */
p_dev->p_iov_info = OSAL_ZALLOC(p_dev, GFP_KERNEL,
sizeof(*p_dev->p_iov_info));
if (!p_dev->p_iov_info) {
@@ -878,8 +872,6 @@ LNX_STATIC void ecore_iov_set_vfs_to_disable(struct ecore_dev *p_dev,
ecore_iov_set_vf_to_disable(p_dev, i, to_disable);
}
-#ifndef LINUX_REMOVE
-/* @@@TBD Consider taking outside of ecore... */
enum _ecore_status_t ecore_iov_set_vf_ctx(struct ecore_hwfn *p_hwfn,
u16 vf_id,
void *ctx)
@@ -897,7 +889,6 @@ enum _ecore_status_t ecore_iov_set_vf_ctx(struct ecore_hwfn *p_hwfn,
}
return rc;
}
-#endif
static void ecore_iov_vf_pglue_clear_err(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt,
@@ -1268,7 +1259,6 @@ ecore_iov_init_hw_for_vf(struct ecore_hwfn *p_hwfn,
return ECORE_INVAL;
}
- /* TODO - remove this once we get confidence of change */
if (!p_params->vport_id) {
DP_NOTICE(p_hwfn, false,
"VF[%d] - Unlikely that VF uses vport0. Forgotten?\n",
@@ -1522,10 +1512,8 @@ static void ecore_iov_lock_vf_pf_channel(struct ecore_hwfn *p_hwfn,
u16 tlv)
{
/* lock the channel */
- /* mutex_lock(&vf->op_mutex); @@@TBD MichalK - add lock... */
/* record the locking op */
- /* vf->op_current = tlv; @@@TBD MichalK */
/* log the lock */
if (ecore_iov_tlv_supported(tlv))
@@ -1547,11 +1535,9 @@ static void ecore_iov_unlock_vf_pf_channel(struct ecore_hwfn *p_hwfn,
* "lock mismatch: expected %s found %s",
* channel_tlvs_string[expected_tlv],
* channel_tlvs_string[vf->op_current]);
- * @@@TBD MichalK
*/
/* lock the channel */
- /* mutex_unlock(&vf->op_mutex); @@@TBD MichalK add the lock */
/* log the unlock */
if (ecore_iov_tlv_supported(expected_tlv))
@@ -1896,9 +1882,6 @@ static u8 ecore_iov_vf_mbx_acquire_resc(struct ecore_hwfn *p_hwfn,
for (i = 0; i < p_resp->num_rxqs; i++) {
p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i];
- /* TODO - what's this sb_qid field? Is it deprecated?
- * or is there an ecore_client that looks at this?
- */
p_resp->hw_sbs[i].sb_qid = 0;
}
@@ -2001,10 +1984,6 @@ static void ecore_iov_vf_mbx_acquire(struct ecore_hwfn *p_hwfn,
pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR;
pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR;
- /* TODO - not doing anything is bad since we'll assert, but this isn't
- * necessarily the right behavior - perhaps we should have allowed some
- * versatility here.
- */
if (vf->state != VF_FREE &&
vf->state != VF_STOPPED) {
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
@@ -2068,7 +2047,7 @@ static void ecore_iov_vf_mbx_acquire(struct ecore_hwfn *p_hwfn,
/* fill in pfdev info */
pfdev_info->chip_num = p_hwfn->p_dev->chip_num;
- pfdev_info->db_size = 0; /* @@@ TBD MichalK Vf Doorbells */
+ pfdev_info->db_size = 0;
pfdev_info->indices_per_sb = ECORE_IS_E4(p_hwfn->p_dev) ? PIS_PER_SB_E4
: PIS_PER_SB_E5;
@@ -2248,7 +2227,6 @@ ecore_iov_reconfigure_unicast_shadow(struct ecore_hwfn *p_hwfn,
{
enum _ecore_status_t rc = ECORE_SUCCESS;
- /* TODO - what about MACs? */
if ((events & (1 << VLAN_ADDR_FORCED)) &&
!(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
@@ -3906,10 +3884,6 @@ static enum _ecore_status_t ecore_iov_vf_update_mac_shadow(struct ecore_hwfn *p_
OSAL_MEM_ZERO(empty_mac, ECORE_ETH_ALEN);
/* If we're in forced-mode, we don't allow any change */
- /* TODO - this would change if we were ever to implement logic for
- * removing a forced MAC altogether [in which case, like for vlans,
- * we should be able to re-trace previous configuration.
- */
if (p_vf->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED))
return ECORE_SUCCESS;
@@ -4012,7 +3986,6 @@ static void ecore_iov_vf_mbx_ucast_filter(struct ecore_hwfn *p_hwfn,
params.opcode = (enum ecore_filter_opcode)req->opcode;
params.type = (enum ecore_filter_ucast_type)req->type;
- /* @@@TBD - We might need logic on HV side in determining this */
params.is_rx_filter = 1;
params.is_tx_filter = 1;
params.vport_to_remove_from = vf->vport_id;
@@ -4319,9 +4292,6 @@ static void ecore_iov_vf_pf_set_coalesce(struct ecore_hwfn *p_hwfn,
vf->rx_coal = rx_coal;
}
- /* TODO - in future, it might be possible to pass this in a per-cid
- * granularity. For now, do this for all Tx queues.
- */
if (tx_coal) {
struct ecore_vf_queue *p_queue = &vf->vf_queues[qid];
@@ -4406,9 +4376,6 @@ ecore_iov_pf_configure_vf_queue_coalesce(struct ecore_hwfn *p_hwfn,
vf->rx_coal = rx_coal;
}
- /* TODO - in future, it might be possible to pass this in a per-cid
- * granularity. For now, do this for all Tx queues.
- */
if (tx_coal) {
struct ecore_vf_queue *p_queue = &vf->vf_queues[qid];
@@ -4546,7 +4513,6 @@ static enum _ecore_status_t ecore_iov_vf_flr_poll(struct ecore_hwfn *p_hwfn,
{
enum _ecore_status_t rc;
- /* TODO - add SRC polling and Tm task once we add storage/iwarp IOV */
rc = ecore_iov_timers_stop(p_hwfn, p_vf, p_ptt);
if (rc)
return rc;
@@ -4580,7 +4546,6 @@ ecore_iov_execute_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
u16 vfid = p_vf->abs_vf_id;
int i;
- /* TODO - should we lock channel? */
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
"VF[%d] - Handling FLR\n", vfid);
@@ -4591,14 +4556,12 @@ ecore_iov_execute_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
if (!p_vf->b_init)
goto cleanup;
- /* TODO - what to do in case of failure? */
rc = ecore_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
if (rc != ECORE_SUCCESS)
goto cleanup;
rc = ecore_final_cleanup(p_hwfn, p_ptt, vfid, true);
if (rc) {
- /* TODO - what's now? What a mess.... */
DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n",
vfid);
return rc;
@@ -4618,7 +4581,6 @@ ecore_iov_execute_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
rc = ecore_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
if (rc) {
- /* TODO - again, a mess... */
DP_ERR(p_hwfn, "Failed to re-enable VF[%d] access\n",
vfid);
return rc;
@@ -4894,9 +4856,8 @@ LNX_STATIC void ecore_iov_process_mbx_req(struct ecore_hwfn *p_hwfn,
* next loaded driver to start again.
*/
if (mbx->first_tlv.tl.type == CHANNEL_TLV_RELEASE) {
- /* TODO - initiate FLR, remove malicious indication */
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
- "VF [%02x] - considered malicious, but wanted to RELEASE. TODO\n",
+ "VF [%02x] - considered malicious, but wanted to RELEASE.\n",
p_vf->abs_vf_id);
} else {
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
@@ -5191,7 +5152,6 @@ ecore_iov_bulletin_set_mac(struct ecore_hwfn *p_hwfn, u8 *mac, int vfid)
return ECORE_SUCCESS;
}
-#ifndef LINUX_REMOVE
enum _ecore_status_t
ecore_iov_bulletin_set_forced_untagged_default(struct ecore_hwfn *p_hwfn,
bool b_untagged_only,
@@ -5248,7 +5208,6 @@ void ecore_iov_get_vfs_opaque_fid(struct ecore_hwfn *p_hwfn, int vfid,
*opaque_fid = vf_info->opaque_fid;
}
-#endif
LNX_STATIC void ecore_iov_bulletin_set_forced_vlan(struct ecore_hwfn *p_hwfn,
u16 pvid, int vfid)
diff --git a/drivers/net/qede/base/ecore_sriov.h b/drivers/net/qede/base/ecore_sriov.h
index 8d8a12b92..3fada4ba8 100644
--- a/drivers/net/qede/base/ecore_sriov.h
+++ b/drivers/net/qede/base/ecore_sriov.h
@@ -192,7 +192,6 @@ struct ecore_vf_info {
u16 igu_sbs[ECORE_MAX_VF_CHAINS_PER_PF];
- /* TODO - Only windows is using it - should be removed */
u8 was_malicious;
u8 num_active_rxqs;
void *ctx;
diff --git a/drivers/net/qede/base/ecore_vf.c b/drivers/net/qede/base/ecore_vf.c
index 9b99e9281..8879b6722 100644
--- a/drivers/net/qede/base/ecore_vf.c
+++ b/drivers/net/qede/base/ecore_vf.c
@@ -113,7 +113,6 @@ ecore_send_msg2pf(struct ecore_hwfn *p_hwfn,
p_hwfn->vf_iov_info->pf2vf_reply,
sizeof(union vfpf_tlvs),
resp_size);
- /* TODO - no prints about message ? */
return rc;
}
#endif
@@ -335,7 +334,6 @@ enum _ecore_status_t ecore_vf_pf_acquire(struct ecore_hwfn *p_hwfn)
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_ACQUIRE, sizeof(*req));
p_resc = &req->resc_request;
- /* @@@ TBD: PF may not be ready bnx2x_get_vf_id... */
req->vfdev_info.opaque_fid = p_hwfn->hw_info.opaque_fid;
p_resc->num_rxqs = ECORE_MAX_QUEUE_VF_CHAINS_PER_PF;
@@ -1143,8 +1141,6 @@ enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn,
/* Starting with CHANNEL_TLV_QID and the need for additional queue
* information, this API stopped supporting multiple rxqs.
- * TODO - remove this and change the API to accept a single queue-cid
- * in a follow-up patch.
*/
if (num_rxqs != 1) {
DP_NOTICE(p_hwfn, true,
diff --git a/drivers/net/qede/base/ecore_vf.h b/drivers/net/qede/base/ecore_vf.h
index 098cbe6b3..6da949fe8 100644
--- a/drivers/net/qede/base/ecore_vf.h
+++ b/drivers/net/qede/base/ecore_vf.h
@@ -185,9 +185,7 @@ enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn *p_hwfn,
enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn *p_hwfn,
struct ecore_queue_cid *p_cid);
-/* TODO - fix all the !SRIOV prototypes */
-#ifndef LINUX_REMOVE
/**
* @brief VF - update the RX queue by sending a message to the
* PF
@@ -205,7 +203,6 @@ enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn,
u8 num_rxqs,
u8 comp_cqe_flg,
u8 comp_event_flg);
-#endif
/**
* @brief VF - send a vport update command
diff --git a/drivers/net/qede/base/ecore_vf_api.h b/drivers/net/qede/base/ecore_vf_api.h
index b664dafbd..5f638aede 100644
--- a/drivers/net/qede/base/ecore_vf_api.h
+++ b/drivers/net/qede/base/ecore_vf_api.h
@@ -150,7 +150,6 @@ bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac);
*/
void ecore_vf_init_admin_mac(struct ecore_hwfn *p_hwfn, u8 *p_mac);
-#ifndef LINUX_REMOVE
/**
* @brief Copy forced MAC address from bulletin board
*
@@ -192,7 +191,6 @@ bool ecore_vf_get_pre_fp_hsi(struct ecore_hwfn *p_hwfn);
*/
void ecore_vf_db_recovery_execute(struct ecore_hwfn *p_hwfn);
-#endif
/**
* @brief Set firmware version information in dev_info from VFs acquire response tlv
diff --git a/drivers/net/qede/base/ecore_vfpf_if.h b/drivers/net/qede/base/ecore_vfpf_if.h
index e03db7c2b..45a0ae429 100644
--- a/drivers/net/qede/base/ecore_vfpf_if.h
+++ b/drivers/net/qede/base/ecore_vfpf_if.h
@@ -7,8 +7,8 @@
#ifndef __ECORE_VF_PF_IF_H__
#define __ECORE_VF_PF_IF_H__
-#define T_ETH_INDIRECTION_TABLE_SIZE 128 /* @@@ TBD MichalK this should be HSI? */
-#define T_ETH_RSS_KEY_SIZE 10 /* @@@ TBD this should be HSI? */
+#define T_ETH_INDIRECTION_TABLE_SIZE 128
+#define T_ETH_RSS_KEY_SIZE 10
/***********************************************
*
@@ -94,20 +94,17 @@ struct vfpf_acquire_tlv {
struct vfpf_first_tlv first_tlv;
struct vf_pf_vfdev_info {
-#ifndef LINUX_REMOVE
/* First bit was used on 8.7.x and 8.8.x versions, which had different
* FWs used but with the same faspath HSI. As this was prior to the
* fastpath versioning, wanted to have ability to override fw matching
* and allow them to interact.
*/
-#endif
#define VFPF_ACQUIRE_CAP_PRE_FP_HSI (1 << 0) /* VF pre-FP hsi version */
#define VFPF_ACQUIRE_CAP_100G (1 << 1) /* VF can support 100g */
/* A requirement for supporting multi-Tx queues on a single queue-zone,
* VF would pass qids as additional information whenever passing queue
* references.
- * TODO - due to the CID limitations in Bar0, VFs currently don't pass
* this, and use the legacy CID scheme.
*/
#define VFPF_ACQUIRE_CAP_QUEUE_QIDS (1 << 2)
@@ -203,11 +200,9 @@ struct pfvf_acquire_resp_tlv {
* To overcome this, PFs now indicate that they're past that point and the new
* VFs would fail probe on the older PFs that fail to do so.
*/
-#ifndef LINUX_REMOVE
/* Said bug was in quest/serpens; Can't be certain no official release included
* the bug since the fix arrived very late in the programs.
*/
-#endif
#define PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE (1 << 2)
/* PF expects queues to be received with additional qids */
diff --git a/drivers/net/qede/base/mcp_public.h b/drivers/net/qede/base/mcp_public.h
index 437482422..aace40dc5 100644
--- a/drivers/net/qede/base/mcp_public.h
+++ b/drivers/net/qede/base/mcp_public.h
@@ -367,7 +367,6 @@ struct lldp_config_params_s {
struct lldp_status_params_s {
u32 prefix_seq_num;
- u32 status; /* TBD */
/* Holds remote Chassis ID TLV header, subtype and 9B of payload. */
u32 peer_chassis_id[LLDP_CHASSIS_ID_STAT_LEN];
/* Holds remote Port ID TLV header, subtype and 9B of payload. */
@@ -605,7 +604,6 @@ enum _attribute_commands_e {
struct public_global {
u32 max_path; /* 32bit is wasty, but this will be used often */
u32 max_ports; /* (Global) 32bit is wasty, but this will be used often */
-#define MODE_1P 1 /* TBD - NEED TO THINK OF A BETTER NAME */
#define MODE_2P 2
#define MODE_3P 3
#define MODE_4P 4
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index 8b151e907..93c39c5b9 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -1193,7 +1193,6 @@ static int qede_dev_stop(struct rte_eth_dev *eth_dev)
qede_stop_queues(eth_dev);
/* Disable traffic */
- ecore_hw_stop_fastpath(edev); /* TBD - loop */
DP_INFO(edev, "Device is stopped\n");
diff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c
index 4f99ab8b7..ae32f1e86 100644
--- a/drivers/net/qede/qede_main.c
+++ b/drivers/net/qede/qede_main.c
@@ -433,7 +433,6 @@ qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
memset(info, 0, sizeof(*info));
- info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
if (IS_PF(edev)) {
int max_vf_vlan_filters = 0;
diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index b6ff59457..ebc010d2d 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ b/drivers/net/qede/qede_rxtx.c
@@ -1395,7 +1395,6 @@ qede_rx_process_tpa_end_cqe(struct qede_dev *qdev,
cqe->len_list[0]);
/* Update total length and frags based on end TPA */
rx_mb = rxq->tpa_info[cqe->tpa_agg_index].tpa_head;
- /* TODO: Add Sanity Checks */
rx_mb->nb_segs = cqe->num_of_bds;
rx_mb->pkt_len = cqe->total_packet_len;
@@ -2172,7 +2171,6 @@ qede_xmit_prep_pkts(__rte_unused void *p_txq, struct rte_mbuf **tx_pkts,
rte_errno = EINVAL;
break;
}
- /* TBD: confirm its ~9700B for both ? */
if (m->tso_segsz > ETH_TX_MAX_NON_LSO_PKT_LEN) {
rte_errno = EINVAL;
break;
@@ -2529,9 +2527,6 @@ qede_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
}
- /* TODO other pseudo checksum modes are
- * not supported
- */
bd2_bf1 |=
ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT;
diff --git a/drivers/net/qede/qede_sriov.c b/drivers/net/qede/qede_sriov.c
index 0b99a8d6f..9fa227cc4 100644
--- a/drivers/net/qede/qede_sriov.c
+++ b/drivers/net/qede/qede_sriov.c
@@ -138,10 +138,6 @@ static void qed_handle_bulletin_post(struct ecore_hwfn *hwfn)
return;
}
- /* TODO - at the moment update bulletin board of all VFs.
- * if this proves to costly, we can mark VFs that need their
- * bulletins updated.
- */
ecore_for_each_vf(hwfn, i)
ecore_iov_post_vf_bulletin(hwfn, i, ptt);
--
2.18.0
next prev parent reply other threads:[~2021-02-19 10:15 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-19 10:14 [dpdk-dev] [PATCH 0/7] net/qede: add support for new HW Rasesh Mody
2021-02-19 10:14 ` [dpdk-dev] [PATCH 2/7] net/qede/base: changes for HSI to support " Rasesh Mody
2021-02-19 10:14 ` [dpdk-dev] [PATCH 3/7] net/qede/base: add OS abstracted changes Rasesh Mody
2021-02-19 10:14 ` [dpdk-dev] [PATCH 4/7] net/qede/base: update base driver to 8.62.4.0 Rasesh Mody
2021-02-19 10:14 ` [dpdk-dev] [PATCH 5/7] net/qede: changes for DMA page chain allocation and free Rasesh Mody
2021-02-19 10:14 ` [dpdk-dev] [PATCH 6/7] net/qede: add support for new HW Rasesh Mody
2021-02-19 10:14 ` Rasesh Mody [this message]
2021-02-19 12:00 ` [dpdk-dev] [PATCH 0/7] " Rasesh Mody
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