From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 868EFA054F; Tue, 2 Mar 2021 08:20:24 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1BBAF1CC4DD; Tue, 2 Mar 2021 08:20:19 +0100 (CET) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 83B0C40F35 for ; Tue, 2 Mar 2021 08:20:17 +0100 (CET) IronPort-SDR: pT2ES0LdKqhB3Mcmxl7bm2kl0VTe3CNlyVfc2A6sHenEfwJHHNOGLeF0tiHmCyYaPIhbB0/Xzx TncdNHc3F2zA== X-IronPort-AV: E=McAfee;i="6000,8403,9910"; a="186775206" X-IronPort-AV: E=Sophos;i="5.81,216,1610438400"; d="scan'208";a="186775206" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Mar 2021 23:20:16 -0800 IronPort-SDR: rB2af2wCR8/LvjrQTtzMD7eOjLmgdLYrkjudPZmy/MSP5MJjHdSkxGJKR74UO9ejmCYVJUeS7O hUXA9UEdR6Tg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,216,1610438400"; d="scan'208";a="506230264" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga001.fm.intel.com with ESMTP; 01 Mar 2021 23:20:13 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, haiyue.wang@intel.com, junfeng.guo@intel.com, Qi Zhang , Amir Shay Date: Tue, 2 Mar 2021 15:23:45 +0800 Message-Id: <20210302072357.1657556-3-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210302072357.1657556-1-qi.z.zhang@intel.com> References: <20210302072357.1657556-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH 02/14] net/ice/base: signed external device package programming X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" External topology devices (e.g. PHYs) connected to Columbiaville or to SoC that includes CPK IP might have a firmware engine within the device and the firmware is usually loaded from NVM connected to the topology device. In some cases, those firmware packages might need to be regularly updated in a secure way to prevent malicious user to burn malicious firmware into the topology device. In other cases, the topology device firmware might be burned independently, as burning the NVM attached to the device might cause the device to stop function but could be fixed without permanent damage. SoC topologies also enable mezzanine card, with an ID EEPROM within it. This ID EEPROM might need an update also. This patch provides these abilities. Signed-off-by: Amir Shay Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_adminq_cmd.h | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index a345fb5a61..3f2b4cd54b 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -1506,11 +1506,12 @@ struct ice_aqc_get_link_status_data { #define ICE_AQ_LINK_TOPO_UNDRUTIL_MEDIA BIT(6) #define ICE_AQ_LINK_TOPO_UNSUPP_MEDIA BIT(7) u8 link_cfg_err; -#define ICE_AQ_LINK_CFG_ERR BIT(0) -#define ICE_AQ_LINK_ACT_PORT_OPT_INVAL BIT(2) +#define ICE_AQ_LINK_CFG_ERR BIT(0) +#define ICE_AQ_LINK_ACT_PORT_OPT_INVAL BIT(2) #define ICE_AQ_LINK_FEAT_ID_OR_CONFIG_ID_INVAL BIT(3) #define ICE_AQ_LINK_TOPO_CRITICAL_SDP_ERR BIT(4) #define ICE_AQ_LINK_MODULE_POWER_UNSUPPORTED BIT(5) +#define ICE_AQ_LINK_EXTERNAL_PHY_LOAD_FAILURE BIT(6) u8 link_info; #define ICE_AQ_LINK_UP BIT(0) /* Link Status */ #define ICE_AQ_LINK_FAULT BIT(1) @@ -1716,6 +1717,25 @@ struct ice_aqc_sw_gpio { u8 rsvd[12]; }; +/* Program topology device NVM (direct, 0x06F2) */ +struct ice_aqc_program_topology_device_nvm { + u8 lport_num; + u8 lport_num_valid; + u8 node_type_ctx; + u8 index; + u8 rsvd[12]; +}; + +/* Read topology device NVM (indirect, 0x06F3) */ +struct ice_aqc_read_topology_device_nvm { + u8 lport_num; + u8 lport_num_valid; + u8 node_type_ctx; + u8 index; + __le32 start_address; + u8 data_read[8]; +}; + /* NVM Read command (indirect 0x0701) * NVM Erase commands (direct 0x0702) * NVM Write commands (indirect 0x0703) @@ -3059,6 +3079,8 @@ enum ice_adminq_opc { ice_aqc_opc_sff_eeprom = 0x06EE, ice_aqc_opc_sw_set_gpio = 0x06EF, ice_aqc_opc_sw_get_gpio = 0x06F0, + ice_aqc_opc_program_topology_device_nvm = 0x06F2, + ice_aqc_opc_read_topology_device_nvm = 0x06F3, /* NVM commands */ ice_aqc_opc_nvm_read = 0x0701, -- 2.26.2