From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EC5ECA0547; Fri, 5 Mar 2021 14:44:56 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1613722A40C; Fri, 5 Mar 2021 14:40:59 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 13E9A22A3DE for ; Fri, 5 Mar 2021 14:40:57 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 125DevhM001889 for ; Fri, 5 Mar 2021 05:40:57 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=D7M76MJ9i3YjWGDHWn1WFafpG2/HeDX0Jhq9dynAD6U=; b=QVFu8O5MlIxQb2pDVXX0ObNPu1rnxC29Rrv9Ds6X6hHBt/mIs2BNp692r10CaDR+z1W1 k5rGFNtYAjTsyv9VH7++jaGuD2IHsZErxI95BnC3OQwA8RYR155Y8wOvSQd9jgA8wRS1 Mu9kIM9+KEW6AstvFsYUEovAwAVf5xsP5kmuGXcHE0Jxc6Vmr8Xq5gVVk0zpaHGXNufD YFaLSviDBGrsshPHX1rXPiQG20dUJTgncib/ecgJAtO9kHcH+rPT2j9hkJOSUpciAltA 3j8A5EsSaKR0fXLZIL4yHLXgSTFLNSR+M6x/AQkLKnCLtE3C5D3z27HsT0yl477IbrDG tQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 372s2umrpm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 05 Mar 2021 05:40:57 -0800 Received: from SC-EXCH03.marvell.com (10.93.176.83) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 5 Mar 2021 05:40:56 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 5 Mar 2021 05:40:55 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 5 Mar 2021 05:40:55 -0800 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 1400A3F7040; Fri, 5 Mar 2021 05:40:52 -0800 (PST) From: Nithin Dabilpuram To: CC: , , , , , , Date: Fri, 5 Mar 2021 19:08:55 +0530 Message-ID: <20210305133918.8005-30-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20210305133918.8005-1-ndabilpuram@marvell.com> References: <20210305133918.8005-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-05_08:2021-03-03, 2021-03-05 signatures=0 Subject: [dpdk-dev] [PATCH 29/52] common/cnxk: add VLAN filter support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori Add helper API to support VLAN filtering and stripping on Rx and VLAN insertion on Tx. Signed-off-by: Sunil Kumar Kori --- drivers/common/cnxk/meson.build | 1 + drivers/common/cnxk/roc_nix.h | 45 ++++++++ drivers/common/cnxk/roc_nix_vlan.c | 205 +++++++++++++++++++++++++++++++++++++ drivers/common/cnxk/version.map | 8 ++ 4 files changed, 259 insertions(+) create mode 100644 drivers/common/cnxk/roc_nix_vlan.c diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build index 4f00b1d..6ec6f4f 100644 --- a/drivers/common/cnxk/meson.build +++ b/drivers/common/cnxk/meson.build @@ -26,6 +26,7 @@ sources = files('roc_dev.c', 'roc_nix_queue.c', 'roc_nix_rss.c', 'roc_nix_stats.c', + 'roc_nix_vlan.c', 'roc_npa.c', 'roc_npa_debug.c', 'roc_npa_irq.c', diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index 441b752..8cd2f26 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -17,6 +17,26 @@ enum roc_nix_sq_max_sqe_sz { roc_nix_maxsqesz_w8 = NIX_MAXSQESZ_W8, }; +enum roc_nix_vlan_type { + ROC_NIX_VLAN_TYPE_INNER = 0x01, + ROC_NIX_VLAN_TYPE_OUTER = 0x02, +}; + +struct roc_nix_vlan_config { + uint32_t type; + union { + struct { + uint32_t vtag_inner; + uint32_t vtag_outer; + } vlan; + + struct { + int idx_inner; + int idx_outer; + } mcam; + }; +}; + /* NIX LF RX offload configuration flags. * These are input flags to roc_nix_lf_alloc:rx_cfg */ @@ -336,6 +356,31 @@ int __roc_api roc_nix_ptp_info_cb_register(struct roc_nix *roc_nix, ptp_info_update_t ptp_update); void __roc_api roc_nix_ptp_info_cb_unregister(struct roc_nix *roc_nix); +/* VLAN */ +int __roc_api +roc_nix_vlan_mcam_entry_read(struct roc_nix *roc_nix, uint32_t index, + struct npc_mcam_read_entry_rsp **rsp); +int __roc_api roc_nix_vlan_mcam_entry_write(struct roc_nix *roc_nix, + uint32_t index, + struct mcam_entry *entry, + uint8_t intf, uint8_t enable); +int __roc_api roc_nix_vlan_mcam_entry_alloc_and_write(struct roc_nix *roc_nix, + struct mcam_entry *entry, + uint8_t intf, + uint8_t priority, + uint8_t ref_entry); +int __roc_api roc_nix_vlan_mcam_entry_free(struct roc_nix *roc_nix, + uint32_t index); +int __roc_api roc_nix_vlan_mcam_entry_ena_dis(struct roc_nix *roc_nix, + uint32_t index, const int enable); +int __roc_api roc_nix_vlan_strip_vtag_ena_dis(struct roc_nix *roc_nix, + bool enable); +int __roc_api roc_nix_vlan_insert_ena_dis(struct roc_nix *roc_nix, + struct roc_nix_vlan_config *vlan_cfg, + uint64_t *mcam_index, bool enable); +int __roc_api roc_nix_vlan_tpid_set(struct roc_nix *roc_nix, uint32_t type, + uint16_t tpid); + /* MCAST*/ int __roc_api roc_nix_mcast_mcam_entry_alloc(struct roc_nix *roc_nix, uint16_t nb_entries, diff --git a/drivers/common/cnxk/roc_nix_vlan.c b/drivers/common/cnxk/roc_nix_vlan.c new file mode 100644 index 0000000..293af82 --- /dev/null +++ b/drivers/common/cnxk/roc_nix_vlan.c @@ -0,0 +1,205 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2020 Marvell. + */ + +#include "roc_api.h" +#include "roc_priv.h" + +static inline struct mbox * +get_mbox(struct roc_nix *roc_nix) +{ + struct nix *nix = roc_nix_to_nix_priv(roc_nix); + struct dev *dev = &nix->dev; + + return dev->mbox; +} + +int +roc_nix_vlan_mcam_entry_read(struct roc_nix *roc_nix, uint32_t index, + struct npc_mcam_read_entry_rsp **rsp) +{ + struct mbox *mbox = get_mbox(roc_nix); + struct npc_mcam_read_entry_req *req; + int rc = -ENOSPC; + + req = mbox_alloc_msg_npc_mcam_read_entry(mbox); + if (req == NULL) + return rc; + req->entry = index; + + return mbox_process_msg(mbox, (void **)rsp); +} + +int +roc_nix_vlan_mcam_entry_write(struct roc_nix *roc_nix, uint32_t index, + struct mcam_entry *entry, uint8_t intf, + uint8_t enable) +{ + struct mbox *mbox = get_mbox(roc_nix); + struct npc_mcam_write_entry_req *req; + struct msghdr *rsp; + int rc = -ENOSPC; + + req = mbox_alloc_msg_npc_mcam_write_entry(mbox); + if (req == NULL) + return rc; + req->entry = index; + req->intf = intf; + req->enable_entry = enable; + mbox_memcpy(&req->entry_data, entry, sizeof(struct mcam_entry)); + + return mbox_process_msg(mbox, (void *)&rsp); +} + +int +roc_nix_vlan_mcam_entry_alloc_and_write(struct roc_nix *roc_nix, + struct mcam_entry *entry, uint8_t intf, + uint8_t priority, uint8_t ref_entry) +{ + struct npc_mcam_alloc_and_write_entry_req *req; + struct npc_mcam_alloc_and_write_entry_rsp *rsp; + struct mbox *mbox = get_mbox(roc_nix); + int rc = -ENOSPC; + + req = mbox_alloc_msg_npc_mcam_alloc_and_write_entry(mbox); + if (req == NULL) + return rc; + req->priority = priority; + req->ref_entry = ref_entry; + req->intf = intf; + req->enable_entry = true; + mbox_memcpy(&req->entry_data, entry, sizeof(struct mcam_entry)); + + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + return rc; + + return rsp->entry; +} + +int +roc_nix_vlan_mcam_entry_free(struct roc_nix *roc_nix, uint32_t index) +{ + struct mbox *mbox = get_mbox(roc_nix); + struct npc_mcam_free_entry_req *req; + int rc = -ENOSPC; + + req = mbox_alloc_msg_npc_mcam_free_entry(mbox); + if (req == NULL) + return rc; + req->entry = index; + + return mbox_process_msg(mbox, NULL); +} + +int +roc_nix_vlan_mcam_entry_ena_dis(struct roc_nix *roc_nix, uint32_t index, + const int enable) +{ + struct npc_mcam_ena_dis_entry_req *req; + struct mbox *mbox = get_mbox(roc_nix); + int rc = -ENOSPC; + + if (enable) { + req = mbox_alloc_msg_npc_mcam_ena_entry(mbox); + if (req == NULL) + return rc; + } else { + req = mbox_alloc_msg_npc_mcam_dis_entry(mbox); + if (req == NULL) + return rc; + } + + req->entry = index; + return mbox_process_msg(mbox, NULL); +} + +int +roc_nix_vlan_strip_vtag_ena_dis(struct roc_nix *roc_nix, bool enable) +{ + struct mbox *mbox = get_mbox(roc_nix); + struct nix_vtag_config *vtag_cfg; + int rc = -ENOSPC; + + vtag_cfg = mbox_alloc_msg_nix_vtag_cfg(mbox); + if (vtag_cfg == NULL) + return rc; + vtag_cfg->vtag_size = NIX_VTAGSIZE_T4; + vtag_cfg->cfg_type = 1; /* Rx VLAN configuration */ + vtag_cfg->rx.capture_vtag = 1; /* Always capture */ + vtag_cfg->rx.vtag_type = 0; /* Use index 0 */ + + if (enable) + vtag_cfg->rx.strip_vtag = 1; + else + vtag_cfg->rx.strip_vtag = 0; + + return mbox_process(mbox); +} + +int +roc_nix_vlan_insert_ena_dis(struct roc_nix *roc_nix, + struct roc_nix_vlan_config *vlan_cfg, + uint64_t *mcam_index, bool enable) +{ + struct mbox *mbox = get_mbox(roc_nix); + struct nix_vtag_config *vtag_cfg; + struct nix_vtag_config_rsp *rsp; + int rc = -ENOSPC; + + vtag_cfg = mbox_alloc_msg_nix_vtag_cfg(mbox); + if (vtag_cfg == NULL) + return rc; + vtag_cfg->cfg_type = 0; /* Tx VLAN configuration */ + vtag_cfg->vtag_size = NIX_VTAGSIZE_T4; + + if (enable) { + if (vlan_cfg->type & ROC_NIX_VLAN_TYPE_INNER) { + vtag_cfg->tx.vtag0 = vlan_cfg->vlan.vtag_inner; + vtag_cfg->tx.cfg_vtag0 = true; + } + if (vlan_cfg->type & ROC_NIX_VLAN_TYPE_OUTER) { + vtag_cfg->tx.vtag1 = vlan_cfg->vlan.vtag_outer; + vtag_cfg->tx.cfg_vtag1 = true; + } + } else { + if (vlan_cfg->type & ROC_NIX_VLAN_TYPE_INNER) { + vtag_cfg->tx.vtag0_idx = vlan_cfg->mcam.idx_inner; + vtag_cfg->tx.free_vtag0 = true; + } + if (vlan_cfg->type & ROC_NIX_VLAN_TYPE_OUTER) { + vtag_cfg->tx.vtag1_idx = vlan_cfg->mcam.idx_outer; + vtag_cfg->tx.free_vtag1 = true; + } + } + + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + return rc; + + if (enable) + *mcam_index = + (((uint64_t)rsp->vtag1_idx << 32) | rsp->vtag0_idx); + + return 0; +} + +int +roc_nix_vlan_tpid_set(struct roc_nix *roc_nix, uint32_t type, uint16_t tpid) +{ + struct mbox *mbox = get_mbox(roc_nix); + struct nix_set_vlan_tpid *tpid_cfg; + int rc = -ENOSPC; + + tpid_cfg = mbox_alloc_msg_nix_set_vlan_tpid(mbox); + if (tpid_cfg == NULL) + return rc; + tpid_cfg->tpid = tpid; + + if (type & ROC_NIX_VLAN_TYPE_OUTER) + tpid_cfg->vlan_type = NIX_VLAN_TYPE_OUTER; + else + tpid_cfg->vlan_type = NIX_VLAN_TYPE_INNER; + + return mbox_process(mbox); +} diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 454e91c..2bac424 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -97,6 +97,14 @@ INTERNAL { roc_nix_xstats_names_get; roc_nix_unregister_cq_irqs; roc_nix_unregister_queue_irqs; + roc_nix_vlan_insert_ena_dis; + roc_nix_vlan_mcam_entry_alloc_and_write; + roc_nix_vlan_mcam_entry_ena_dis; + roc_nix_vlan_mcam_entry_free; + roc_nix_vlan_mcam_entry_read; + roc_nix_vlan_mcam_entry_write; + roc_nix_vlan_strip_vtag_ena_dis; + roc_nix_vlan_tpid_set; roc_npa_aura_limit_modify; roc_npa_aura_op_range_set; roc_npa_ctx_dump; -- 2.8.4