From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 378D5A0547; Fri, 5 Mar 2021 14:45:16 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AB86F22A3F4; Fri, 5 Mar 2021 14:41:05 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 2495C22A40E for ; Fri, 5 Mar 2021 14:41:03 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 125DelHZ001661 for ; Fri, 5 Mar 2021 05:41:03 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=s1iA26ZvTgqRsxLluImc/J7G7mwLxU7hmQvkyymx6mM=; b=bS66hsxsCuwaLJnZhe9+kwTnx3oGqJemTZadP1bqLqffaybikOLtK3vjdvBbgm85idE1 hbcWlhtC81MKgVlkJYc+1V1lPXhB8mm+XEGfO8zh0B8b7Hu5Irgp6RRiA8cHf9uQo18J mX3hIiNU5sSgOBkkvpkfbWbtFKPwMAtmPiQda146ggW0NsMtjjLT/cuhIvPmT9zX7K6m AHpK1MVnqY63qYabimk6C3RMLqdIVYIqaFKKSE9Y2//VPqMx/1Sb0V5FfbbmEduxVYIa /cprQMIZZlr3VxnC1mPLtn7K63NPnyy6wIuv/qORDTvhgb1sQ+fcprga1+rh6L1qCZLj Ww== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 372s2umrq3-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 05 Mar 2021 05:41:03 -0800 Received: from SC-EXCH04.marvell.com (10.93.176.84) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 5 Mar 2021 05:41:01 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 5 Mar 2021 05:41:01 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 5 Mar 2021 05:41:01 -0800 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id D6C083F7041; Fri, 5 Mar 2021 05:40:58 -0800 (PST) From: Nithin Dabilpuram To: CC: , , , , , , Date: Fri, 5 Mar 2021 19:08:57 +0530 Message-ID: <20210305133918.8005-32-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20210305133918.8005-1-ndabilpuram@marvell.com> References: <20210305133918.8005-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-05_08:2021-03-03, 2021-03-05 signatures=0 Subject: [dpdk-dev] [PATCH 31/52] common/cnxk: add nix LSO support and misc utils X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori Add support to create LSO formats for TCP segmentation offload for IPv4/IPv6, tunnel and non-tunnel protocols. Tunnel protocol support is for GRE and UDP based tunnel protocols. This patch also adds other helper API to retrieve eeprom info and configure Rx for different switch headers. Signed-off-by: Sunil Kumar Kori --- drivers/common/cnxk/meson.build | 1 + drivers/common/cnxk/roc_nix.h | 14 ++ drivers/common/cnxk/roc_nix_ops.c | 416 ++++++++++++++++++++++++++++++++++++++ drivers/common/cnxk/version.map | 3 + 4 files changed, 434 insertions(+) create mode 100644 drivers/common/cnxk/roc_nix_ops.c diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build index e33d3f5..5eedb39 100644 --- a/drivers/common/cnxk/meson.build +++ b/drivers/common/cnxk/meson.build @@ -23,6 +23,7 @@ sources = files('roc_dev.c', 'roc_nix_mac.c', 'roc_nix_mcast.c', 'roc_nix_npc.c', + 'roc_nix_ops.c', 'roc_nix_ptp.c', 'roc_nix_queue.c', 'roc_nix_rss.c', diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index e60a35d..01f8a9f 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -59,6 +59,12 @@ struct roc_nix_fc_cfg { }; }; +struct roc_nix_eeprom_info { +#define ROC_NIX_EEPROM_SIZE 256 + uint16_t sff_id; + uint8_t buf[ROC_NIX_EEPROM_SIZE]; +}; + /* NIX LF RX offload configuration flags. * These are input flags to roc_nix_lf_alloc:rx_cfg */ @@ -310,6 +316,14 @@ int __roc_api roc_nix_mac_link_cb_register(struct roc_nix *roc_nix, link_status_t link_update); void __roc_api roc_nix_mac_link_cb_unregister(struct roc_nix *roc_nix); +/* Ops */ +int __roc_api roc_nix_switch_hdr_set(struct roc_nix *roc_nix, + uint64_t switch_header_type); +int __roc_api roc_nix_lso_fmt_setup(struct roc_nix *roc_nix); + +int __roc_api roc_nix_eeprom_info_get(struct roc_nix *roc_nix, + struct roc_nix_eeprom_info *info); + /* Flow control */ int __roc_api roc_nix_fc_config_set(struct roc_nix *roc_nix, struct roc_nix_fc_cfg *fc_cfg); diff --git a/drivers/common/cnxk/roc_nix_ops.c b/drivers/common/cnxk/roc_nix_ops.c new file mode 100644 index 0000000..501b957 --- /dev/null +++ b/drivers/common/cnxk/roc_nix_ops.c @@ -0,0 +1,416 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2020 Marvell. + */ + +#include "roc_api.h" +#include "roc_priv.h" + +static inline struct mbox * +get_mbox(struct roc_nix *roc_nix) +{ + struct nix *nix = roc_nix_to_nix_priv(roc_nix); + struct dev *dev = &nix->dev; + + return dev->mbox; +} + +static void +nix_lso_tcp(struct nix_lso_format_cfg *req, bool v4) +{ + __io struct nix_lso_format *field; + + /* Format works only with TCP packet marked by OL3/OL4 */ + field = (__io struct nix_lso_format *)&req->fields[0]; + req->field_mask = NIX_LSO_FIELD_MASK; + /* Outer IPv4/IPv6 */ + field->layer = NIX_TXLAYER_OL3; + field->offset = v4 ? 2 : 4; + field->sizem1 = 1; /* 2B */ + field->alg = NIX_LSOALG_ADD_PAYLEN; + field++; + if (v4) { + /* IPID field */ + field->layer = NIX_TXLAYER_OL3; + field->offset = 4; + field->sizem1 = 1; + /* Incremented linearly per segment */ + field->alg = NIX_LSOALG_ADD_SEGNUM; + field++; + } + + /* TCP sequence number update */ + field->layer = NIX_TXLAYER_OL4; + field->offset = 4; + field->sizem1 = 3; /* 4 bytes */ + field->alg = NIX_LSOALG_ADD_OFFSET; + field++; + /* TCP flags field */ + field->layer = NIX_TXLAYER_OL4; + field->offset = 12; + field->sizem1 = 1; + field->alg = NIX_LSOALG_TCP_FLAGS; + field++; +} + +static void +nix_lso_udp_tun_tcp(struct nix_lso_format_cfg *req, bool outer_v4, + bool inner_v4) +{ + __io struct nix_lso_format *field; + + field = (__io struct nix_lso_format *)&req->fields[0]; + req->field_mask = NIX_LSO_FIELD_MASK; + /* Outer IPv4/IPv6 len */ + field->layer = NIX_TXLAYER_OL3; + field->offset = outer_v4 ? 2 : 4; + field->sizem1 = 1; /* 2B */ + field->alg = NIX_LSOALG_ADD_PAYLEN; + field++; + if (outer_v4) { + /* IPID */ + field->layer = NIX_TXLAYER_OL3; + field->offset = 4; + field->sizem1 = 1; + /* Incremented linearly per segment */ + field->alg = NIX_LSOALG_ADD_SEGNUM; + field++; + } + + /* Outer UDP length */ + field->layer = NIX_TXLAYER_OL4; + field->offset = 4; + field->sizem1 = 1; + field->alg = NIX_LSOALG_ADD_PAYLEN; + field++; + + /* Inner IPv4/IPv6 */ + field->layer = NIX_TXLAYER_IL3; + field->offset = inner_v4 ? 2 : 4; + field->sizem1 = 1; /* 2B */ + field->alg = NIX_LSOALG_ADD_PAYLEN; + field++; + if (inner_v4) { + /* IPID field */ + field->layer = NIX_TXLAYER_IL3; + field->offset = 4; + field->sizem1 = 1; + /* Incremented linearly per segment */ + field->alg = NIX_LSOALG_ADD_SEGNUM; + field++; + } + + /* TCP sequence number update */ + field->layer = NIX_TXLAYER_IL4; + field->offset = 4; + field->sizem1 = 3; /* 4 bytes */ + field->alg = NIX_LSOALG_ADD_OFFSET; + field++; + + /* TCP flags field */ + field->layer = NIX_TXLAYER_IL4; + field->offset = 12; + field->sizem1 = 1; + field->alg = NIX_LSOALG_TCP_FLAGS; + field++; +} + +static void +nix_lso_tun_tcp(struct nix_lso_format_cfg *req, bool outer_v4, bool inner_v4) +{ + __io struct nix_lso_format *field; + + field = (__io struct nix_lso_format *)&req->fields[0]; + req->field_mask = NIX_LSO_FIELD_MASK; + /* Outer IPv4/IPv6 len */ + field->layer = NIX_TXLAYER_OL3; + field->offset = outer_v4 ? 2 : 4; + field->sizem1 = 1; /* 2B */ + field->alg = NIX_LSOALG_ADD_PAYLEN; + field++; + if (outer_v4) { + /* IPID */ + field->layer = NIX_TXLAYER_OL3; + field->offset = 4; + field->sizem1 = 1; + /* Incremented linearly per segment */ + field->alg = NIX_LSOALG_ADD_SEGNUM; + field++; + } + + /* Inner IPv4/IPv6 */ + field->layer = NIX_TXLAYER_IL3; + field->offset = inner_v4 ? 2 : 4; + field->sizem1 = 1; /* 2B */ + field->alg = NIX_LSOALG_ADD_PAYLEN; + field++; + if (inner_v4) { + /* IPID field */ + field->layer = NIX_TXLAYER_IL3; + field->offset = 4; + field->sizem1 = 1; + /* Incremented linearly per segment */ + field->alg = NIX_LSOALG_ADD_SEGNUM; + field++; + } + + /* TCP sequence number update */ + field->layer = NIX_TXLAYER_IL4; + field->offset = 4; + field->sizem1 = 3; /* 4 bytes */ + field->alg = NIX_LSOALG_ADD_OFFSET; + field++; + + /* TCP flags field */ + field->layer = NIX_TXLAYER_IL4; + field->offset = 12; + field->sizem1 = 1; + field->alg = NIX_LSOALG_TCP_FLAGS; + field++; +} + +int +roc_nix_lso_fmt_setup(struct roc_nix *roc_nix) +{ + struct nix *nix = roc_nix_to_nix_priv(roc_nix); + struct mbox *mbox = get_mbox(roc_nix); + struct nix_lso_format_cfg_rsp *rsp; + struct nix_lso_format_cfg *req; + uint8_t base; + int rc = -ENOSPC; + + /* + * IPv4/TCP LSO + */ + req = mbox_alloc_msg_nix_lso_format_cfg(mbox); + if (req == NULL) + return rc; + nix_lso_tcp(req, true); + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + return rc; + + base = rsp->lso_format_idx; + if (base != NIX_LSO_FORMAT_IDX_TSOV4) + return NIX_ERR_INTERNAL; + + nix->lso_base_idx = base; + plt_nix_dbg("tcpv4 lso fmt=%u\n", base); + + /* + * IPv6/TCP LSO + */ + req = mbox_alloc_msg_nix_lso_format_cfg(mbox); + if (req == NULL) + return -ENOSPC; + nix_lso_tcp(req, false); + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + return rc; + + if (rsp->lso_format_idx != base + 1) + return NIX_ERR_INTERNAL; + + plt_nix_dbg("tcpv6 lso fmt=%u\n", base + 1); + + /* + * IPv4/UDP/TUN HDR/IPv4/TCP LSO + */ + req = mbox_alloc_msg_nix_lso_format_cfg(mbox); + if (req == NULL) + return -ENOSPC; + nix_lso_udp_tun_tcp(req, true, true); + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + return rc; + + if (rsp->lso_format_idx != base + 2) + return NIX_ERR_INTERNAL; + + plt_nix_dbg("udp tun v4v4 fmt=%u\n", base + 2); + + /* + * IPv4/UDP/TUN HDR/IPv6/TCP LSO + */ + req = mbox_alloc_msg_nix_lso_format_cfg(mbox); + if (req == NULL) + return -ENOSPC; + nix_lso_udp_tun_tcp(req, true, false); + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + return rc; + + if (rsp->lso_format_idx != base + 3) + return NIX_ERR_INTERNAL; + + plt_nix_dbg("udp tun v4v6 fmt=%u\n", base + 3); + + /* + * IPv6/UDP/TUN HDR/IPv4/TCP LSO + */ + req = mbox_alloc_msg_nix_lso_format_cfg(mbox); + if (req == NULL) + return -ENOSPC; + nix_lso_udp_tun_tcp(req, false, true); + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + return rc; + + if (rsp->lso_format_idx != base + 4) + return NIX_ERR_INTERNAL; + + plt_nix_dbg("udp tun v6v4 fmt=%u\n", base + 4); + + /* + * IPv6/UDP/TUN HDR/IPv6/TCP LSO + */ + req = mbox_alloc_msg_nix_lso_format_cfg(mbox); + if (req == NULL) + return -ENOSPC; + nix_lso_udp_tun_tcp(req, false, false); + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + return rc; + if (rsp->lso_format_idx != base + 5) + return NIX_ERR_INTERNAL; + + plt_nix_dbg("udp tun v6v6 fmt=%u\n", base + 5); + + /* + * IPv4/TUN HDR/IPv4/TCP LSO + */ + req = mbox_alloc_msg_nix_lso_format_cfg(mbox); + if (req == NULL) + return -ENOSPC; + nix_lso_tun_tcp(req, true, true); + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + return rc; + + if (rsp->lso_format_idx != base + 6) + return NIX_ERR_INTERNAL; + + plt_nix_dbg("tun v4v4 fmt=%u\n", base + 6); + + /* + * IPv4/TUN HDR/IPv6/TCP LSO + */ + req = mbox_alloc_msg_nix_lso_format_cfg(mbox); + if (req == NULL) + return -ENOSPC; + nix_lso_tun_tcp(req, true, false); + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + return rc; + + if (rsp->lso_format_idx != base + 7) + return NIX_ERR_INTERNAL; + + plt_nix_dbg("tun v4v6 fmt=%u\n", base + 7); + + /* + * IPv6/TUN HDR/IPv4/TCP LSO + */ + req = mbox_alloc_msg_nix_lso_format_cfg(mbox); + if (req == NULL) + return -ENOSPC; + nix_lso_tun_tcp(req, false, true); + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + return rc; + + if (rsp->lso_format_idx != base + 8) + return NIX_ERR_INTERNAL; + + plt_nix_dbg("tun v6v4 fmt=%u\n", base + 8); + + /* + * IPv6/TUN HDR/IPv6/TCP LSO + */ + req = mbox_alloc_msg_nix_lso_format_cfg(mbox); + if (req == NULL) + return -ENOSPC; + nix_lso_tun_tcp(req, false, false); + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + return rc; + + if (rsp->lso_format_idx != base + 9) + return NIX_ERR_INTERNAL; + + plt_nix_dbg("tun v6v6 fmt=%u\n", base + 9); + return 0; +} + +int +roc_nix_switch_hdr_set(struct roc_nix *roc_nix, uint64_t switch_header_type) +{ + struct mbox *mbox = get_mbox(roc_nix); + struct npc_set_pkind *req; + struct msg_resp *rsp; + int rc = -ENOSPC; + + if (switch_header_type == 0) + switch_header_type = ROC_PRIV_FLAGS_DEFAULT; + + if (switch_header_type != ROC_PRIV_FLAGS_DEFAULT && + switch_header_type != ROC_PRIV_FLAGS_EDSA && + switch_header_type != ROC_PRIV_FLAGS_HIGIG && + switch_header_type != ROC_PRIV_FLAGS_LEN_90B && + switch_header_type != ROC_PRIV_FLAGS_CUSTOM) { + plt_err("switch header type is not supported"); + return NIX_ERR_PARAM; + } + + if (switch_header_type == ROC_PRIV_FLAGS_LEN_90B && + !roc_nix_is_sdp(roc_nix)) { + plt_err("chlen90b is not supported on non-SDP device"); + return NIX_ERR_PARAM; + } + + if (switch_header_type == ROC_PRIV_FLAGS_HIGIG && + roc_nix_is_vf_or_sdp(roc_nix)) { + plt_err("higig2 is supported on PF devices only"); + return NIX_ERR_PARAM; + } + + req = mbox_alloc_msg_npc_set_pkind(mbox); + if (req == NULL) + return rc; + req->mode = switch_header_type; + req->dir = PKIND_RX; + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) + return rc; + + req = mbox_alloc_msg_npc_set_pkind(mbox); + if (req == NULL) + return -ENOSPC; + req->mode = switch_header_type; + req->dir = PKIND_TX; + return mbox_process_msg(mbox, (void *)&rsp); +} + +int +roc_nix_eeprom_info_get(struct roc_nix *roc_nix, + struct roc_nix_eeprom_info *info) +{ + struct mbox *mbox = get_mbox(roc_nix); + struct cgx_fw_data *rsp = NULL; + int rc; + + if (!info) { + plt_err("Input buffer is NULL"); + return NIX_ERR_PARAM; + } + + mbox_alloc_msg_cgx_get_aux_link_info(mbox); + rc = mbox_process_msg(mbox, (void *)&rsp); + if (rc) { + plt_err("Failed to get fw data: %d", rc); + return rc; + } + + info->sff_id = rsp->fwdata.sfp_eeprom.sff_id; + mbox_memcpy(info->buf, rsp->fwdata.sfp_eeprom.buf, SFP_EEPROM_SIZE); + return 0; +} diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index e4d47a1..7ee657c 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -40,6 +40,7 @@ INTERNAL { roc_nix_lf_free; roc_nix_lf_get_reg_count; roc_nix_lf_reg_dump; + roc_nix_lso_fmt_setup; roc_nix_mac_addr_add; roc_nix_mac_addr_del; roc_nix_mac_addr_set; @@ -99,6 +100,8 @@ INTERNAL { roc_nix_num_xstats_get; roc_nix_xstats_get; roc_nix_xstats_names_get; + roc_nix_switch_hdr_set; + roc_nix_eeprom_info_get; roc_nix_unregister_cq_irqs; roc_nix_unregister_queue_irqs; roc_nix_vlan_insert_ena_dis; -- 2.8.4