From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 96DFCA0548; Sat, 6 Mar 2021 17:34:16 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DC28422A4E9; Sat, 6 Mar 2021 17:31:28 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id B590B22A372 for ; Sat, 6 Mar 2021 17:31:27 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 126GS7Ww011590 for ; Sat, 6 Mar 2021 08:31:27 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=7zZpKom/CNWPowesfU40YYGgOoHQh+haYXGXWFSAHd8=; b=XNpprN2bv6gzSkMzToxl4ceFIiGRNbE3aaD26zFJL00qYoJVW8GYTEtriYjifK2pL4sW KCg+jJfS2DWxg7er6hBzfRSwUs8u+yYXTMSSQDppcmD/pSRc7hy3bb5Bw4hz/fAdfyhg +2P3IrOX5Og41MeiVf9JKzSU5psAqaFA6WPH1ZYmfB7qBH/g35uQWUdmKVaGU2Yh2hVJ 418s0yoMSy9DXD+FCc2RiYlHtdjnpwwbSUxg5dygHV4CZO2Hw7Xy01B9eyUb7pWxqzVj /31Fyqa41rEEVH170YmO+dbC8Y3MLYdNLnT5owejPuzjUcb+HKoTpDN8Q57zA3rqoKjk lw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 374a4w08r1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 06 Mar 2021 08:31:27 -0800 Received: from SC-EXCH02.marvell.com (10.93.176.82) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 6 Mar 2021 08:31:25 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 6 Mar 2021 08:31:24 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 6 Mar 2021 08:31:24 -0800 Received: from BG-LT7430.marvell.com (unknown [10.193.68.121]) by maili.marvell.com (Postfix) with ESMTP id CB8973F703F; Sat, 6 Mar 2021 08:31:22 -0800 (PST) From: To: , Pavan Nikhilesh , "Shijith Thotton" CC: , Date: Sat, 6 Mar 2021 21:59:28 +0530 Message-ID: <20210306162942.6845-24-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210306162942.6845-1-pbhagavatula@marvell.com> References: <20210306162942.6845-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-06_08:2021-03-03, 2021-03-06 signatures=0 Subject: [dpdk-dev] [PATCH 23/36] event/cnxk: allow adapters to resize inflights X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Add internal SSO functions to allow event adapters to resize SSO buffers that are used to hold in-flight events in DRAM. Signed-off-by: Pavan Nikhilesh Signed-off-by: Shijith Thotton --- drivers/event/cnxk/cnxk_eventdev.c | 33 ++++++++++++ drivers/event/cnxk/cnxk_eventdev.h | 7 +++ drivers/event/cnxk/cnxk_eventdev_adptr.c | 67 ++++++++++++++++++++++++ drivers/event/cnxk/cnxk_tim_evdev.c | 5 ++ drivers/event/cnxk/meson.build | 1 + 5 files changed, 113 insertions(+) create mode 100644 drivers/event/cnxk/cnxk_eventdev_adptr.c diff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c index c404bb586..29e38478d 100644 --- a/drivers/event/cnxk/cnxk_eventdev.c +++ b/drivers/event/cnxk/cnxk_eventdev.c @@ -77,6 +77,9 @@ cnxk_sso_xaq_allocate(struct cnxk_sso_evdev *dev) xaq_cnt = dev->nb_event_queues * CNXK_SSO_XAQ_CACHE_CNT; if (dev->xae_cnt) xaq_cnt += dev->xae_cnt / dev->sso.xae_waes; + else if (dev->adptr_xae_cnt) + xaq_cnt += (dev->adptr_xae_cnt / dev->sso.xae_waes) + + (CNXK_SSO_XAQ_SLACK * dev->nb_event_queues); else xaq_cnt += (dev->sso.iue / dev->sso.xae_waes) + (CNXK_SSO_XAQ_SLACK * dev->nb_event_queues); @@ -125,6 +128,36 @@ cnxk_sso_xaq_allocate(struct cnxk_sso_evdev *dev) return rc; } +int +cnxk_sso_xae_reconfigure(struct rte_eventdev *event_dev) +{ + struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); + int rc = 0; + + if (event_dev->data->dev_started) + event_dev->dev_ops->dev_stop(event_dev); + + rc = roc_sso_hwgrp_release_xaq(&dev->sso, dev->nb_event_queues); + if (rc < 0) { + plt_err("Failed to release XAQ %d", rc); + return rc; + } + + rte_mempool_free(dev->xaq_pool); + dev->xaq_pool = NULL; + rc = cnxk_sso_xaq_allocate(dev); + if (rc < 0) { + plt_err("Failed to alloc XAQ %d", rc); + return rc; + } + + rte_mb(); + if (event_dev->data->dev_started) + event_dev->dev_ops->dev_start(event_dev); + + return 0; +} + int cnxk_setup_event_ports(const struct rte_eventdev *event_dev, cnxk_sso_init_hws_mem_t init_hws_fn, diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h index 487c7f822..32abf9632 100644 --- a/drivers/event/cnxk/cnxk_eventdev.h +++ b/drivers/event/cnxk/cnxk_eventdev.h @@ -81,6 +81,10 @@ struct cnxk_sso_evdev { uint64_t nb_xaq_cfg; rte_iova_t fc_iova; struct rte_mempool *xaq_pool; + uint64_t adptr_xae_cnt; + uint16_t tim_adptr_ring_cnt; + uint16_t *timer_adptr_rings; + uint64_t *timer_adptr_sz; /* Dev args */ uint32_t xae_cnt; uint8_t qos_queue_cnt; @@ -190,7 +194,10 @@ cnxk_sso_hws_get_cookie(void *ws) } /* Configuration functions */ +int cnxk_sso_xae_reconfigure(struct rte_eventdev *event_dev); int cnxk_sso_xaq_allocate(struct cnxk_sso_evdev *dev); +void cnxk_sso_updt_xae_cnt(struct cnxk_sso_evdev *dev, void *data, + uint32_t event_type); /* Common ops API. */ int cnxk_sso_init(struct rte_eventdev *event_dev); diff --git a/drivers/event/cnxk/cnxk_eventdev_adptr.c b/drivers/event/cnxk/cnxk_eventdev_adptr.c new file mode 100644 index 000000000..6d9615453 --- /dev/null +++ b/drivers/event/cnxk/cnxk_eventdev_adptr.c @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell International Ltd. + */ + +#include "cnxk_eventdev.h" + +void +cnxk_sso_updt_xae_cnt(struct cnxk_sso_evdev *dev, void *data, + uint32_t event_type) +{ + int i; + + switch (event_type) { + case RTE_EVENT_TYPE_TIMER: { + struct cnxk_tim_ring *timr = data; + uint16_t *old_ring_ptr; + uint64_t *old_sz_ptr; + + for (i = 0; i < dev->tim_adptr_ring_cnt; i++) { + if (timr->ring_id != dev->timer_adptr_rings[i]) + continue; + if (timr->nb_timers == dev->timer_adptr_sz[i]) + return; + dev->adptr_xae_cnt -= dev->timer_adptr_sz[i]; + dev->adptr_xae_cnt += timr->nb_timers; + dev->timer_adptr_sz[i] = timr->nb_timers; + + return; + } + + dev->tim_adptr_ring_cnt++; + old_ring_ptr = dev->timer_adptr_rings; + old_sz_ptr = dev->timer_adptr_sz; + + dev->timer_adptr_rings = rte_realloc( + dev->timer_adptr_rings, + sizeof(uint16_t) * dev->tim_adptr_ring_cnt, 0); + if (dev->timer_adptr_rings == NULL) { + dev->adptr_xae_cnt += timr->nb_timers; + dev->timer_adptr_rings = old_ring_ptr; + dev->tim_adptr_ring_cnt--; + return; + } + + dev->timer_adptr_sz = rte_realloc( + dev->timer_adptr_sz, + sizeof(uint64_t) * dev->tim_adptr_ring_cnt, 0); + + if (dev->timer_adptr_sz == NULL) { + dev->adptr_xae_cnt += timr->nb_timers; + dev->timer_adptr_sz = old_sz_ptr; + dev->tim_adptr_ring_cnt--; + return; + } + + dev->timer_adptr_rings[dev->tim_adptr_ring_cnt - 1] = + timr->ring_id; + dev->timer_adptr_sz[dev->tim_adptr_ring_cnt - 1] = + timr->nb_timers; + + dev->adptr_xae_cnt += timr->nb_timers; + break; + } + default: + break; + } +} diff --git a/drivers/event/cnxk/cnxk_tim_evdev.c b/drivers/event/cnxk/cnxk_tim_evdev.c index 44bcad94d..4add1d659 100644 --- a/drivers/event/cnxk/cnxk_tim_evdev.c +++ b/drivers/event/cnxk/cnxk_tim_evdev.c @@ -161,6 +161,11 @@ cnxk_tim_ring_create(struct rte_event_timer_adapter *adptr) plt_write64((uint64_t)tim_ring->bkt, tim_ring->base + TIM_LF_RING_BASE); plt_write64(tim_ring->aura, tim_ring->base + TIM_LF_RING_AURA); + /* Update SSO xae count. */ + cnxk_sso_updt_xae_cnt(cnxk_sso_pmd_priv(dev->event_dev), tim_ring, + RTE_EVENT_TYPE_TIMER); + cnxk_sso_xae_reconfigure(dev->event_dev); + plt_tim_dbg( "Total memory used %" PRIu64 "MB\n", (uint64_t)(((tim_ring->nb_chunks * tim_ring->chunk_sz) + diff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build index 6e9f3daab..a9566cb09 100644 --- a/drivers/event/cnxk/meson.build +++ b/drivers/event/cnxk/meson.build @@ -12,6 +12,7 @@ sources = files('cn10k_worker.c', 'cn10k_eventdev.c', 'cn9k_worker.c', 'cn9k_eventdev.c', + 'cnxk_eventdev_adptr.c', 'cnxk_eventdev.c', 'cnxk_sso_selftest.c', 'cnxk_tim_evdev.c') -- 2.17.1