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From: Ivan Malov <ivan.malov@oktetlabs.ru>
To: dev@dpdk.org
Cc: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,
	Andy Moreton <amoreton@xilinx.com>, Ray Kinsella <mdr@ashroe.eu>,
	Neil Horman <nhorman@tuxdriver.com>
Subject: [dpdk-dev] [PATCH v2 05/10] common/sfc_efx/base: support encap. header provisioning
Date: Fri, 12 Mar 2021 14:07:40 +0300
Message-ID: <20210312110745.31721-5-ivan.malov@oktetlabs.ru> (raw)
In-Reply-To: <20210312110745.31721-1-ivan.malov@oktetlabs.ru>

Let the client allocate / free encap. headers.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
---
 drivers/common/sfc_efx/base/efx.h     |  21 ++++
 drivers/common/sfc_efx/base/efx_mae.c | 155 ++++++++++++++++++++++++++
 drivers/common/sfc_efx/version.map    |   2 +
 3 files changed, 178 insertions(+)

diff --git a/drivers/common/sfc_efx/base/efx.h b/drivers/common/sfc_efx/base/efx.h
index ccf9c7ab8..4a738e589 100644
--- a/drivers/common/sfc_efx/base/efx.h
+++ b/drivers/common/sfc_efx/base/efx.h
@@ -4070,6 +4070,7 @@ typedef struct efx_mae_limits_s {
 	uint32_t			eml_max_n_action_prios;
 	uint32_t			eml_max_n_outer_prios;
 	uint32_t			eml_encap_types_supported;
+	uint32_t			eml_encap_header_size_limit;
 } efx_mae_limits_t;
 
 LIBEFX_API
@@ -4324,6 +4325,26 @@ efx_mae_match_spec_outer_rule_id_set(
 	__in				efx_mae_match_spec_t *spec,
 	__in				const efx_mae_rule_id_t *or_idp);
 
+/* Encap. header ID */
+typedef struct efx_mae_eh_id_s {
+	uint32_t id;
+} efx_mae_eh_id_t;
+
+LIBEFX_API
+extern	__checkReturn			efx_rc_t
+efx_mae_encap_header_alloc(
+	__in				efx_nic_t *enp,
+	__in				efx_tunnel_protocol_t encap_type,
+	__in_bcount(header_size)	uint8_t *header_data,
+	__in				size_t header_size,
+	__out				efx_mae_eh_id_t *eh_idp);
+
+LIBEFX_API
+extern	__checkReturn			efx_rc_t
+efx_mae_encap_header_free(
+	__in				efx_nic_t *enp,
+	__in				const efx_mae_eh_id_t *eh_idp);
+
 /* Action set ID */
 typedef struct efx_mae_aset_id_s {
 	uint32_t id;
diff --git a/drivers/common/sfc_efx/base/efx_mae.c b/drivers/common/sfc_efx/base/efx_mae.c
index 338a0013f..798867963 100644
--- a/drivers/common/sfc_efx/base/efx_mae.c
+++ b/drivers/common/sfc_efx/base/efx_mae.c
@@ -353,6 +353,8 @@ efx_mae_get_limits(
 	emlp->eml_max_n_outer_prios = maep->em_max_n_outer_prios;
 	emlp->eml_max_n_action_prios = maep->em_max_n_action_prios;
 	emlp->eml_encap_types_supported = maep->em_encap_types_supported;
+	emlp->eml_encap_header_size_limit =
+	    MC_CMD_MAE_ENCAP_HEADER_ALLOC_IN_HDR_DATA_MAXNUM_MCDI2;
 
 	return (0);
 
@@ -1691,6 +1693,159 @@ efx_mae_match_spec_outer_rule_id_set(
 
 	return (0);
 
+fail3:
+	EFSYS_PROBE(fail3);
+fail2:
+	EFSYS_PROBE(fail2);
+fail1:
+	EFSYS_PROBE1(fail1, efx_rc_t, rc);
+	return (rc);
+}
+
+	 __checkReturn			efx_rc_t
+efx_mae_encap_header_alloc(
+	__in				efx_nic_t *enp,
+	__in				efx_tunnel_protocol_t encap_type,
+	__in_bcount(header_size)	uint8_t *header_data,
+	__in				size_t header_size,
+	__out				efx_mae_eh_id_t *eh_idp)
+{
+	const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+	efx_mcdi_req_t req;
+	EFX_MCDI_DECLARE_BUF(payload,
+	    MC_CMD_MAE_ENCAP_HEADER_ALLOC_IN_LENMAX_MCDI2,
+	    MC_CMD_MAE_ENCAP_HEADER_ALLOC_OUT_LEN);
+	uint32_t encap_type_mcdi;
+	efx_mae_eh_id_t eh_id;
+	efx_rc_t rc;
+
+	EFX_STATIC_ASSERT(sizeof (eh_idp->id) ==
+	    MC_CMD_MAE_ENCAP_HEADER_ALLOC_OUT_ENCAP_HEADER_ID_LEN);
+
+	EFX_STATIC_ASSERT(EFX_MAE_RSRC_ID_INVALID ==
+	    MC_CMD_MAE_ENCAP_HEADER_ALLOC_OUT_ENCAP_HEADER_ID_NULL);
+
+	if (encp->enc_mae_supported == B_FALSE) {
+		rc = ENOTSUP;
+		goto fail1;
+	}
+
+	switch (encap_type) {
+	case EFX_TUNNEL_PROTOCOL_NONE:
+		encap_type_mcdi = MAE_MCDI_ENCAP_TYPE_NONE;
+		break;
+	case EFX_TUNNEL_PROTOCOL_VXLAN:
+		encap_type_mcdi = MAE_MCDI_ENCAP_TYPE_VXLAN;
+		break;
+	case EFX_TUNNEL_PROTOCOL_GENEVE:
+		encap_type_mcdi = MAE_MCDI_ENCAP_TYPE_GENEVE;
+		break;
+	case EFX_TUNNEL_PROTOCOL_NVGRE:
+		encap_type_mcdi = MAE_MCDI_ENCAP_TYPE_NVGRE;
+		break;
+	default:
+		rc = ENOTSUP;
+		goto fail2;
+	}
+
+	if (header_size >
+	    MC_CMD_MAE_ENCAP_HEADER_ALLOC_IN_HDR_DATA_MAXNUM_MCDI2) {
+		rc = EINVAL;
+		goto fail3;
+	}
+
+	req.emr_cmd = MC_CMD_MAE_ENCAP_HEADER_ALLOC;
+	req.emr_in_buf = payload;
+	req.emr_in_length = MC_CMD_MAE_ENCAP_HEADER_ALLOC_IN_LEN(header_size);
+	req.emr_out_buf = payload;
+	req.emr_out_length = MC_CMD_MAE_ENCAP_HEADER_ALLOC_OUT_LEN;
+
+	MCDI_IN_SET_DWORD(req,
+	    MAE_ENCAP_HEADER_ALLOC_IN_ENCAP_TYPE, encap_type_mcdi);
+
+	memcpy(payload + MC_CMD_MAE_ENCAP_HEADER_ALLOC_IN_HDR_DATA_OFST,
+	    header_data, header_size);
+
+	efx_mcdi_execute(enp, &req);
+
+	if (req.emr_rc != 0) {
+		rc = req.emr_rc;
+		goto fail4;
+	}
+
+	if (req.emr_out_length_used < MC_CMD_MAE_ENCAP_HEADER_ALLOC_OUT_LEN) {
+		rc = EMSGSIZE;
+		goto fail5;
+	}
+
+	eh_id.id = MCDI_OUT_DWORD(req,
+	    MAE_ENCAP_HEADER_ALLOC_OUT_ENCAP_HEADER_ID);
+
+	if (eh_id.id == EFX_MAE_RSRC_ID_INVALID) {
+		rc = ENOENT;
+		goto fail6;
+	}
+
+	eh_idp->id = eh_id.id;
+
+	return (0);
+
+fail6:
+	EFSYS_PROBE(fail6);
+fail5:
+	EFSYS_PROBE(fail5);
+fail4:
+	EFSYS_PROBE(fail4);
+fail3:
+	EFSYS_PROBE(fail3);
+fail2:
+	EFSYS_PROBE(fail2);
+fail1:
+	EFSYS_PROBE1(fail1, efx_rc_t, rc);
+	return (rc);
+}
+
+	__checkReturn			efx_rc_t
+efx_mae_encap_header_free(
+	__in				efx_nic_t *enp,
+	__in				const efx_mae_eh_id_t *eh_idp)
+{
+	const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+	efx_mcdi_req_t req;
+	EFX_MCDI_DECLARE_BUF(payload,
+	    MC_CMD_MAE_ENCAP_HEADER_FREE_IN_LEN(1),
+	    MC_CMD_MAE_ENCAP_HEADER_FREE_OUT_LEN(1));
+	efx_rc_t rc;
+
+	if (encp->enc_mae_supported == B_FALSE) {
+		rc = ENOTSUP;
+		goto fail1;
+	}
+
+	req.emr_cmd = MC_CMD_MAE_ENCAP_HEADER_FREE;
+	req.emr_in_buf = payload;
+	req.emr_in_length = MC_CMD_MAE_ENCAP_HEADER_FREE_IN_LEN(1);
+	req.emr_out_buf = payload;
+	req.emr_out_length = MC_CMD_MAE_ENCAP_HEADER_FREE_OUT_LEN(1);
+
+	MCDI_IN_SET_DWORD(req, MAE_ENCAP_HEADER_FREE_IN_EH_ID, eh_idp->id);
+
+	efx_mcdi_execute(enp, &req);
+
+	if (req.emr_rc != 0) {
+		rc = req.emr_rc;
+		goto fail2;
+	}
+
+	if (MCDI_OUT_DWORD(req, MAE_ENCAP_HEADER_FREE_OUT_FREED_EH_ID) !=
+	    eh_idp->id) {
+		/* Firmware failed to remove the encap. header. */
+		rc = EAGAIN;
+		goto fail3;
+	}
+
+	return (0);
+
 fail3:
 	EFSYS_PROBE(fail3);
 fail2:
diff --git a/drivers/common/sfc_efx/version.map b/drivers/common/sfc_efx/version.map
index 403feeaf1..168899d51 100644
--- a/drivers/common/sfc_efx/version.map
+++ b/drivers/common/sfc_efx/version.map
@@ -98,6 +98,8 @@ INTERNAL {
 	efx_mae_action_set_spec_fini;
 	efx_mae_action_set_spec_init;
 	efx_mae_action_set_specs_equal;
+	efx_mae_encap_header_alloc;
+	efx_mae_encap_header_free;
 	efx_mae_fini;
 	efx_mae_get_limits;
 	efx_mae_init;
-- 
2.20.1


  parent reply	other threads:[~2021-03-12 11:08 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-12  9:31 [dpdk-dev] [PATCH 01/10] ethdev: reuse header definition in flow pattern item ETH Ivan Malov
2021-03-12  9:31 ` [dpdk-dev] [PATCH 02/10] ethdev: reuse header definition in flow pattern item VLAN Ivan Malov
2021-03-16 23:05   ` Ori Kam
2021-03-12  9:31 ` [dpdk-dev] [PATCH 03/10] net: clarify endianness of 32-bit fields in VXLAN headers Ivan Malov
2021-03-12  9:31 ` [dpdk-dev] [PATCH 04/10] ethdev: reuse header definition in flow pattern item VXLAN Ivan Malov
2021-03-12  9:31 ` [dpdk-dev] [PATCH 05/10] common/sfc_efx/base: support encap. header provisioning Ivan Malov
2021-03-12  9:31 ` [dpdk-dev] [PATCH 06/10] common/sfc_efx/base: support adding action ENCAP to a set Ivan Malov
2021-03-12  9:31 ` [dpdk-dev] [PATCH 07/10] net/sfc: change MAE rule actions parse API Ivan Malov
2021-03-12  9:31 ` [dpdk-dev] [PATCH 08/10] net/sfc: support action VXLAN ENCAP in MAE backend Ivan Malov
2021-03-12  9:31 ` [dpdk-dev] [PATCH 09/10] common/sfc_efx/base: support adding action DECAP to a set Ivan Malov
2021-03-12  9:31 ` [dpdk-dev] [PATCH 10/10] net/sfc: support action VXLAN DECAP in transfer rules Ivan Malov
2021-03-12 11:07 ` [dpdk-dev] [PATCH v2 01/10] ethdev: reuse header definition in flow pattern item ETH Ivan Malov
2021-03-12 11:07   ` [dpdk-dev] [PATCH v2 02/10] ethdev: reuse header definition in flow pattern item VLAN Ivan Malov
2021-03-16 16:58     ` Ferruh Yigit
2021-03-12 11:07   ` [dpdk-dev] [PATCH v2 03/10] net: clarify endianness of 32-bit fields in VXLAN headers Ivan Malov
2021-03-16 17:34     ` Ferruh Yigit
2021-03-12 11:07   ` [dpdk-dev] [PATCH v2 04/10] ethdev: reuse header definition in flow pattern item VXLAN Ivan Malov
2021-03-16 17:35     ` Ferruh Yigit
2021-03-12 11:07   ` Ivan Malov [this message]
2021-03-12 11:07   ` [dpdk-dev] [PATCH v2 06/10] common/sfc_efx/base: support adding action ENCAP to a set Ivan Malov
2021-03-12 11:07   ` [dpdk-dev] [PATCH v2 07/10] net/sfc: change MAE rule actions parse API Ivan Malov
2021-03-12 11:07   ` [dpdk-dev] [PATCH v2 08/10] net/sfc: support action VXLAN ENCAP in MAE backend Ivan Malov
2021-03-16 17:10     ` Ivan Malov
2021-03-16 17:15       ` Ferruh Yigit
2021-03-31 23:21     ` Thomas Monjalon
2021-03-31 23:36       ` Ivan Malov
2021-04-01  6:38         ` Andrew Rybchenko
2021-03-12 11:07   ` [dpdk-dev] [PATCH v2 09/10] common/sfc_efx/base: support adding action DECAP to a set Ivan Malov
2021-03-12 11:07   ` [dpdk-dev] [PATCH v2 10/10] net/sfc: support action VXLAN DECAP in transfer rules Ivan Malov
2021-03-16 16:58   ` [dpdk-dev] [PATCH v2 01/10] ethdev: reuse header definition in flow pattern item ETH Ferruh Yigit
2021-03-16 17:38   ` Ferruh Yigit
2021-03-17  6:40     ` Andrew Rybchenko
2021-03-22  9:01       ` Ferruh Yigit
2021-03-22 10:10         ` Andrew Rybchenko
2021-03-22 16:49   ` Ferruh Yigit
2021-03-16 23:03 ` [dpdk-dev] [PATCH " Ori Kam

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