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From: Thomas Monjalon <thomas@monjalon.net>
To: dev@dpdk.org
Cc: ncopa@alpinelinux.org, stable@dpdk.org,
 Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,
 David Marchand <david.marchand@redhat.com>,
 Ferruh Yigit <ferruh.yigit@intel.com>,
 Yuanhan Liu <yuanhan.liu@linux.intel.com>,
 David Marchand <david.marchand@6wind.com>
Date: Fri, 19 Mar 2021 15:57:24 +0100
Message-Id: <20210319145730.3555384-12-thomas@monjalon.net>
X-Mailer: git-send-email 2.30.1
In-Reply-To: <20210319145730.3555384-1-thomas@monjalon.net>
References: <20190313170657.16688-1-ncopa@alpinelinux.org>
 <20210319145730.3555384-1-thomas@monjalon.net>
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Subject: [dpdk-dev] [PATCH v7 11/17] bus/pci: support I/O port operations
 with musl
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Add a fallback for non-GNU libc systems like musl libc for the
non-standard functions outl_p, outw_p and outb_p.

It solves the following errors when building with musl libc:
	pci_uio.c: undefined reference to 'outw_p'
	pci_uio.c: undefined reference to 'outl_p'
	pci_uio.c: undefined reference to 'outb_p'

Bugzilla ID: 35
Fixes: 756ce64b1ecd ("eal: introduce PCI ioport API")
Cc: stable@dpdk.org

Reported-by: Natanael Copa <ncopa@alpinelinux.org>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: David Marchand <david.marchand@redhat.com>
---
 drivers/bus/pci/linux/pci_uio.c | 32 ++++++++++++++++++++++++++++++--
 1 file changed, 30 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c
index 0907051e04..39ebeac2a0 100644
--- a/drivers/bus/pci/linux/pci_uio.c
+++ b/drivers/bus/pci/linux/pci_uio.c
@@ -526,13 +526,18 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
 #endif
 
 #if defined(RTE_ARCH_X86)
+
 static inline uint8_t ioread8(void *addr)
 {
 	uint8_t val;
 
 	val = (uint64_t)(uintptr_t)addr >= PIO_MAX ?
 		*(volatile uint8_t *)addr :
+#ifdef __GLIBC__
 		inb_p((unsigned long)addr);
+#else
+		inb((unsigned long)addr);
+#endif
 
 	return val;
 }
@@ -543,7 +548,11 @@ static inline uint16_t ioread16(void *addr)
 
 	val = (uint64_t)(uintptr_t)addr >= PIO_MAX ?
 		*(volatile uint16_t *)addr :
+#ifdef __GLIBC__
 		inw_p((unsigned long)addr);
+#else
+		inw((unsigned long)addr);
+#endif
 
 	return val;
 }
@@ -554,7 +563,11 @@ static inline uint32_t ioread32(void *addr)
 
 	val = (uint64_t)(uintptr_t)addr >= PIO_MAX ?
 		*(volatile uint32_t *)addr :
+#ifdef __GLIBC__
 		inl_p((unsigned long)addr);
+#else
+		inl((unsigned long)addr);
+#endif
 
 	return val;
 }
@@ -563,23 +576,37 @@ static inline void iowrite8(uint8_t val, void *addr)
 {
 	(uint64_t)(uintptr_t)addr >= PIO_MAX ?
 		*(volatile uint8_t *)addr = val :
+#ifdef __GLIBC__
 		outb_p(val, (unsigned long)addr);
+#else
+		outb(val, (unsigned long)addr);
+#endif
 }
 
 static inline void iowrite16(uint16_t val, void *addr)
 {
 	(uint64_t)(uintptr_t)addr >= PIO_MAX ?
 		*(volatile uint16_t *)addr = val :
+#ifdef __GLIBC__
 		outw_p(val, (unsigned long)addr);
+#else
+		outw(val, (unsigned long)addr);
+#endif
 }
 
 static inline void iowrite32(uint32_t val, void *addr)
 {
 	(uint64_t)(uintptr_t)addr >= PIO_MAX ?
 		*(volatile uint32_t *)addr = val :
+#ifdef __GLIBC__
 		outl_p(val, (unsigned long)addr);
-}
 #else
+		outl(val, (unsigned long)addr);
+#endif
+}
+
+#else /* !RTE_ARCH_X86 */
+
 static inline uint8_t ioread8(void *addr)
 {
 	return *(volatile uint8_t *)addr;
@@ -609,7 +636,8 @@ static inline void iowrite32(uint32_t val, void *addr)
 {
 	*(volatile uint32_t *)addr = val;
 }
-#endif
+
+#endif /* !RTE_ARCH_X86 */
 
 void
 pci_uio_ioport_read(struct rte_pci_ioport *p,
-- 
2.30.1