From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8C8A9A034F; Wed, 31 Mar 2021 19:23:39 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 16425140F1F; Wed, 31 Mar 2021 19:23:39 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 861C9140F11 for ; Wed, 31 Mar 2021 19:23:37 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 12VHKqvD028930; Wed, 31 Mar 2021 10:23:33 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=pfpt0220; bh=imQTkw7+SypPxqlfJGkc6ibLjV5JLDQoTu/48ZYtwwo=; b=eBdBia+wpfl0DAamHwqOGilvKj+mmB+NQ39VOtmyju0nzKB6xXJzDcwyG5nR9woMow+l VTGJ0Gjv8uokSJP6yuwXmFb01mJ11HwGtHfXR7B/jNjgVioBIV7BiSW+sKq7FNM0k64D O+bs2Bg+JTGR1os0tqHwp16M87HqA4slhJcXIexLwEhDH0VR8WDVkQC3hCybfFBk5Yvi loVYMoaR9jVpt3ynDc7CBTodp/mSi4r/N6O04kX7QxF4BIELmp6lohIMe8PD8lePzpI7 AK8pl0yYpqtFN1N88TL4YnMkrutHGLoXA3tMFTl+xfJdxrzDnlstxjGwA4ow451c1FXJ Ag== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 37ma9w3at7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 31 Mar 2021 10:23:33 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 31 Mar 2021 10:23:31 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 31 Mar 2021 10:23:31 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 4D99F3F703F; Wed, 31 Mar 2021 10:23:28 -0700 (PDT) From: Nithin Dabilpuram To: , Jan Viktorin , Ruifeng Wang , Honnappa Nagarahalli CC: , , , , , , , Nithin Dabilpuram Date: Wed, 31 Mar 2021 22:53:20 +0530 Message-ID: <20210331172320.29130-1-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: xkPzYukIrkYgTRfjmFJLg8CIQaaqffpp X-Proofpoint-ORIG-GUID: xkPzYukIrkYgTRfjmFJLg8CIQaaqffpp X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-31_08:2021-03-31, 2021-03-31 signatures=0 Subject: [dpdk-dev] [PATCH] config/arm: add support for Marvell CN10K X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Add config support to cross compile for Marvell CN10K SoC. Marvell CN10K SoC is based on ARM Neoverse N2 cores. Signed-off-by: Nithin Dabilpuram Signed-off-by: Pavan Nikhilesh --- config/arm/arm64_cn10k_linux_gcc | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 config/arm/arm64_cn10k_linux_gcc diff --git a/config/arm/arm64_cn10k_linux_gcc b/config/arm/arm64_cn10k_linux_gcc new file mode 100644 index 0000000..4f8e7cb --- /dev/null +++ b/config/arm/arm64_cn10k_linux_gcc @@ -0,0 +1,20 @@ +[binaries] +c = 'aarch64-linux-gnu-gcc' +cpp = 'aarch64-linux-gnu-cpp' +ar = 'aarch64-linux-gnu-gcc-ar' +strip = 'aarch64-linux-gnu-strip' +pkgconfig = 'aarch64-linux-gnu-pkg-config' +pcap-config = '' + +[host_machine] +system = 'linux' +cpu_family = 'aarch64' +cpu = 'armv8.6-a' +endian = 'little' + +[properties] +implementer_id = '0x41' +part_number = '0xd49' +max_lcores = 36 +max_numa_nodes = 1 +numa = false -- 2.8.4