From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A38A2A0548; Fri, 2 Apr 2021 17:16:42 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DCFA8141081; Fri, 2 Apr 2021 17:16:37 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id 660E8141077 for ; Fri, 2 Apr 2021 17:16:35 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from lizh@nvidia.com) with SMTP; 2 Apr 2021 18:16:33 +0300 Received: from nvidia.com (c-235-17-1-009.mtl.labs.mlnx [10.235.17.9]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 132FGWdR028272; Fri, 2 Apr 2021 18:16:33 +0300 From: Li Zhang To: dekelp@nvidia.com, orika@nvidia.com, viacheslavo@nvidia.com, matan@nvidia.com, shahafs@nvidia.com Cc: dev@dpdk.org, thomas@monjalon.net, rasland@nvidia.com, roniba@nvidia.com, Shun Hao Date: Fri, 2 Apr 2021 18:16:18 +0300 Message-Id: <20210402151627.1531623-5-lizh@nvidia.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20210402151627.1531623-1-lizh@nvidia.com> References: <20210331073632.1443011-1-lizh@nvidia.com> <20210402151627.1531623-1-lizh@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v2 04/13] net/mlx5: use mask for meter register setting X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Shun Hao ASO meter feature may require to locate the flow context tag action after the ASO action. When color register is shared by meter_id/flow_id, it's like: Bits[0-7] A meter color value set by the HW. Bits[8-31] A flow id and meter id set by SW. Currently the tag action for meter writes all the bits of the meter register, so it will potentially overwrite meter color when ASO meter action is before the tag action. Set only 24-MSB-bits of meter register in the meter tag action. Signed-off-by: Shun Hao --- drivers/net/mlx5/mlx5_flow.c | 27 +++++++++++++++++---------- drivers/net/mlx5/mlx5_flow.h | 2 ++ drivers/net/mlx5/mlx5_flow_dv.c | 2 ++ 3 files changed, 21 insertions(+), 10 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index cffd6129e8..3bcc3f910e 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -4274,9 +4274,11 @@ flow_hairpin_split(struct rte_eth_dev *dev, rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action)); actions_rx++; set_tag = (void *)actions_rx; - set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL); + *set_tag = (struct mlx5_rte_flow_action_set_tag) { + .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL), + .data = flow_id, + }; MLX5_ASSERT(set_tag->id > REG_NON); - set_tag->data = flow_id; tag_action->conf = set_tag; /* Create Tx item list. */ rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action)); @@ -4511,6 +4513,13 @@ flow_meter_split_prep(struct rte_eth_dev *dev, set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre; tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items; tag_item_mask = tag_item_spec + 1; + /* Both flow_id and meter_id share the same register. */ + *set_tag = (struct mlx5_rte_flow_action_set_tag) { + .id = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID, 0, error), + .offset = mtr_id_offset, + .length = mtr_reg_bits, + .data = fm->idx, + }; /* * The color Reg bits used by flow_id are growing from * msb to lsb, so must do bit reverse for flow_id val in RegC. @@ -4518,13 +4527,9 @@ flow_meter_split_prep(struct rte_eth_dev *dev, for (shift = 0; shift < flow_id_bits; shift++) flow_id_val = (flow_id_val << 1) | (((tag_id - 1) >> shift) & 0x1); - /* Both flow_id and meter_id share the same register. */ - set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID, 0, error); - set_tag->data = - (fm->idx | (flow_id_val << (mtr_reg_bits - flow_id_bits))) - << mtr_id_offset; + set_tag->data |= flow_id_val << (mtr_reg_bits - flow_id_bits); tag_item_spec->id = set_tag->id; - tag_item_spec->data = set_tag->data; + tag_item_spec->data = set_tag->data << mtr_id_offset; tag_item_mask->data = UINT32_MAX << mtr_id_offset; tag_action->type = (enum rte_flow_action_type) MLX5_RTE_FLOW_ACTION_TYPE_TAG; @@ -4911,10 +4916,12 @@ flow_sample_split_prep(struct rte_eth_dev *dev, ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error); if (ret < 0) return ret; - set_tag->id = ret; mlx5_ipool_malloc(priv->sh->ipool [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id); - set_tag->data = tag_id; + *set_tag = (struct mlx5_rte_flow_action_set_tag) { + .id = ret, + .data = tag_id, + }; /* Prepare the suffix subflow items. */ tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM); tag_spec->data = tag_id; diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 76870b8061..e7f0906209 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -55,6 +55,8 @@ struct mlx5_rte_flow_item_tag { /* Modify selected register. */ struct mlx5_rte_flow_action_set_tag { enum modify_reg id; + uint8_t offset; + uint8_t length; uint32_t data; }; diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index d5c8f32038..30fec09987 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -964,6 +964,8 @@ flow_dv_convert_action_set_reg actions[i] = (struct mlx5_modification_cmd) { .action_type = MLX5_MODIFICATION_TYPE_SET, .field = reg_to_field[conf->id], + .offset = conf->offset, + .length = conf->length, }; actions[i].data0 = rte_cpu_to_be_32(actions[i].data0); actions[i].data1 = rte_cpu_to_be_32(conf->data); -- 2.27.0