From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EBC25A0548; Sat, 3 Apr 2021 16:18:48 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 38BF4140E54; Sat, 3 Apr 2021 16:18:30 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 52904140E35 for ; Sat, 3 Apr 2021 16:18:29 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 133EHPxV004836 for ; Sat, 3 Apr 2021 07:18:28 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=mj8J/pQ7kUa3fsAvqWMQnyHPacc5py+6X7c4uteKjLQ=; b=ZCZPyeHSJ9wjVBDW0UK/r4+Lh5P0JJdq4IVcQqAYyOHXathg5Naz8Ff1cknNzAG9qpXT P49qo4ImwB16dNCfYKj0/c+JIZiwMFuTV0Myb5EcYwRWumNd3dda00jOKMDTa1+yadL+ JHjFHNPqdXRDvqEGYMYESLy8rZGU9jC853/qFK13k58CxmzLY3P/p+VqPC/+lcg6l2pw OFHuLop6EQc81CScrA7roYcwggL18g6eJFD3FKxdGqEwXMRR3wDFw7AXpR1EYZ4g8SyS VGpQmxgr/r4P+vb0BPR4AhM7MWJVs86XO8rhRtl9IPyB4hFEaTaP7wAr/Gu8Jk8VmOwf IQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 37pnqqrbya-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 03 Apr 2021 07:18:28 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 3 Apr 2021 07:18:27 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 3 Apr 2021 07:18:27 -0700 Received: from lab-ci-142.marvell.com (unknown [10.28.36.142]) by maili.marvell.com (Postfix) with ESMTP id 0001D3F7040; Sat, 3 Apr 2021 07:18:23 -0700 (PDT) From: Ashwin Sekhar T K To: CC: , , , , , , Date: Sat, 3 Apr 2021 19:47:46 +0530 Message-ID: <20210403141751.215926-6-asekhar@marvell.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210403141751.215926-1-asekhar@marvell.com> References: <20210305162149.2196166-1-asekhar@marvell.com> <20210403141751.215926-1-asekhar@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: 7QFyBlfqNfjTQ7_JlAfgOGYXrrHPaImg X-Proofpoint-GUID: 7QFyBlfqNfjTQ7_JlAfgOGYXrrHPaImg X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-04-03_05:2021-04-01, 2021-04-03 signatures=0 Subject: [dpdk-dev] [PATCH v2 06/11] mempool/cnxk: add cn9k optimized mempool enqueue/dequeue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add Marvell CN9k mempool enqueue/dequeue. Marvell CN9k supports burst dequeue which allows to dequeue up to 32 pointers using pipelined casp instructions. Signed-off-by: Pavan Nikhilesh Signed-off-by: Ashwin Sekhar T K --- doc/guides/mempool/cnxk.rst | 4 +++ drivers/mempool/cnxk/cn9k_mempool_ops.c | 39 +++++++++++++++++++++++-- 2 files changed, 41 insertions(+), 2 deletions(-) diff --git a/doc/guides/mempool/cnxk.rst b/doc/guides/mempool/cnxk.rst index 907c19c841..f51532b101 100644 --- a/doc/guides/mempool/cnxk.rst +++ b/doc/guides/mempool/cnxk.rst @@ -21,6 +21,10 @@ CNXK NPA PMD supports: - Ethdev Rx buffer allocation in HW to save CPU cycles in the Rx path. - Ethdev Tx buffer recycling in HW to save CPU cycles in the Tx path. +CN9k NPA supports: + +- Burst alloc of up to 32 pointers. + Prerequisites and Compilation procedure --------------------------------------- diff --git a/drivers/mempool/cnxk/cn9k_mempool_ops.c b/drivers/mempool/cnxk/cn9k_mempool_ops.c index f5ac163af9..c0cdba640b 100644 --- a/drivers/mempool/cnxk/cn9k_mempool_ops.c +++ b/drivers/mempool/cnxk/cn9k_mempool_ops.c @@ -7,6 +7,41 @@ #include "roc_api.h" #include "cnxk_mempool.h" +static int __rte_hot +cn9k_mempool_enq(struct rte_mempool *mp, void *const *obj_table, unsigned int n) +{ + /* Ensure mbuf init changes are written before the free pointers + * are enqueued to the stack. + */ + rte_io_wmb(); + roc_npa_aura_op_bulk_free(mp->pool_id, (const uint64_t *)obj_table, n, + 0); + + return 0; +} + +static inline int __rte_hot +cn9k_mempool_deq(struct rte_mempool *mp, void **obj_table, unsigned int n) +{ + unsigned int count; + + count = roc_npa_aura_op_bulk_alloc(mp->pool_id, (uint64_t *)obj_table, + n, 0, 1); + + if (unlikely(count != n)) { + /* If bulk alloc failed to allocate all pointers, try + * allocating remaining pointers with the default alloc + * with retry scheme. + */ + if (cnxk_mempool_deq(mp, &obj_table[count], n - count)) { + cn9k_mempool_enq(mp, obj_table, count); + return -ENOENT; + } + } + + return 0; +} + static int cn9k_mempool_alloc(struct rte_mempool *mp) { @@ -44,8 +79,8 @@ static struct rte_mempool_ops cn9k_mempool_ops = { .name = "cn9k_mempool_ops", .alloc = cn9k_mempool_alloc, .free = cnxk_mempool_free, - .enqueue = cnxk_mempool_enq, - .dequeue = cnxk_mempool_deq, + .enqueue = cn9k_mempool_enq, + .dequeue = cn9k_mempool_deq, .get_count = cnxk_mempool_get_count, .calc_mem_size = cnxk_mempool_calc_mem_size, .populate = cnxk_mempool_populate, -- 2.31.0