[dpdk-dev] [PATCH v5 49/52] common/cnxk: add sso debug support

[Nithin Dabilpuram <ndabilpuram@marvell.com>]

From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Add sso debug dump support. This dumps all SSO LF register values
to a given file handle.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 drivers/common/cnxk/meson.build     |  1 +
 drivers/common/cnxk/roc_sso.h       |  4 +++
 drivers/common/cnxk/roc_sso_debug.c | 68 +++++++++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map     |  1 +
 4 files changed, 74 insertions(+)
 create mode 100644 drivers/common/cnxk/roc_sso_debug.c

diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build
index d28e273..e6e2ad3 100644
--- a/drivers/common/cnxk/meson.build
+++ b/drivers/common/cnxk/meson.build
@@ -40,6 +40,7 @@ sources = files('roc_dev.c',
 		'roc_npc_utils.c',
 		'roc_platform.c',
 		'roc_sso.c',
+		'roc_sso_debug.c',
 		'roc_sso_irq.c',
 		'roc_utils.c')
 includes += include_directories('../../bus/pci')
diff --git a/drivers/common/cnxk/roc_sso.h b/drivers/common/cnxk/roc_sso.h
index ed2713c..f85799b 100644
--- a/drivers/common/cnxk/roc_sso.h
+++ b/drivers/common/cnxk/roc_sso.h
@@ -58,4 +58,8 @@ uintptr_t __roc_api roc_sso_hws_base_get(struct roc_sso *roc_sso, uint8_t hws);
 uintptr_t __roc_api roc_sso_hwgrp_base_get(struct roc_sso *roc_sso,
 					   uint16_t hwgrp);
 
+/* Debug */
+void __roc_api roc_sso_dump(struct roc_sso *roc_sso, uint8_t nb_hws,
+			    uint16_t hwgrp, FILE *f);
+
 #endif /* _ROC_SSOW_H_ */
diff --git a/drivers/common/cnxk/roc_sso_debug.c b/drivers/common/cnxk/roc_sso_debug.c
new file mode 100644
index 0000000..7571bad
--- /dev/null
+++ b/drivers/common/cnxk/roc_sso_debug.c
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include "roc_api.h"
+#include "roc_priv.h"
+
+static void
+sso_hws_dump(uintptr_t base, FILE *f)
+{
+	fprintf(f, "SSOW_LF_GWS Base addr   0x%" PRIx64 "\n", (uint64_t)base);
+	fprintf(f, "SSOW_LF_GWS_LINKS       0x%" PRIx64 "\n",
+		plt_read64(base + SSOW_LF_GWS_LINKS));
+	fprintf(f, "SSOW_LF_GWS_PENDWQP     0x%" PRIx64 "\n",
+		plt_read64(base + SSOW_LF_GWS_PENDWQP));
+	fprintf(f, "SSOW_LF_GWS_PENDSTATE   0x%" PRIx64 "\n",
+		plt_read64(base + SSOW_LF_GWS_PENDSTATE));
+	fprintf(f, "SSOW_LF_GWS_NW_TIM      0x%" PRIx64 "\n",
+		plt_read64(base + SSOW_LF_GWS_NW_TIM));
+	fprintf(f, "SSOW_LF_GWS_TAG         0x%" PRIx64 "\n",
+		plt_read64(base + SSOW_LF_GWS_TAG));
+	fprintf(f, "SSOW_LF_GWS_WQP         0x%" PRIx64 "\n",
+		plt_read64(base + SSOW_LF_GWS_TAG));
+	fprintf(f, "SSOW_LF_GWS_SWTP        0x%" PRIx64 "\n",
+		plt_read64(base + SSOW_LF_GWS_SWTP));
+	fprintf(f, "SSOW_LF_GWS_PENDTAG     0x%" PRIx64 "\n",
+		plt_read64(base + SSOW_LF_GWS_PENDTAG));
+}
+
+static void
+sso_hwgrp_dump(uintptr_t base, FILE *f)
+{
+	fprintf(f, "SSO_LF_GGRP Base addr   0x%" PRIx64 "\n", (uint64_t)base);
+	fprintf(f, "SSO_LF_GGRP_QCTL        0x%" PRIx64 "\n",
+		plt_read64(base + SSO_LF_GGRP_QCTL));
+	fprintf(f, "SSO_LF_GGRP_XAQ_CNT     0x%" PRIx64 "\n",
+		plt_read64(base + SSO_LF_GGRP_XAQ_CNT));
+	fprintf(f, "SSO_LF_GGRP_INT_THR     0x%" PRIx64 "\n",
+		plt_read64(base + SSO_LF_GGRP_INT_THR));
+	fprintf(f, "SSO_LF_GGRP_INT_CNT     0x%" PRIX64 "\n",
+		plt_read64(base + SSO_LF_GGRP_INT_CNT));
+	fprintf(f, "SSO_LF_GGRP_AQ_CNT      0x%" PRIX64 "\n",
+		plt_read64(base + SSO_LF_GGRP_AQ_CNT));
+	fprintf(f, "SSO_LF_GGRP_AQ_THR      0x%" PRIX64 "\n",
+		plt_read64(base + SSO_LF_GGRP_AQ_THR));
+	fprintf(f, "SSO_LF_GGRP_MISC_CNT    0x%" PRIx64 "\n",
+		plt_read64(base + SSO_LF_GGRP_MISC_CNT));
+}
+
+void
+roc_sso_dump(struct roc_sso *roc_sso, uint8_t nb_hws, uint16_t hwgrp, FILE *f)
+{
+	struct dev *dev = &roc_sso_to_sso_priv(roc_sso)->dev;
+	uintptr_t base;
+	int i;
+
+	/* Dump SSOW registers */
+	for (i = 0; i < nb_hws; i++) {
+		base = dev->bar2 + (RVU_BLOCK_ADDR_SSOW << 20 | i << 12);
+		sso_hws_dump(base, f);
+	}
+
+	/* Dump SSO registers */
+	for (i = 0; i < hwgrp; i++) {
+		base = dev->bar2 + (RVU_BLOCK_ADDR_SSO << 20 | i << 12);
+		sso_hwgrp_dump(base, f);
+	}
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index b4c6964..1e5e8ab 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -175,6 +175,7 @@ INTERNAL {
 	roc_plt_init_cb_register;
 	roc_sso_dev_fini;
 	roc_sso_dev_init;
+	roc_sso_dump;
 	roc_sso_hwgrp_alloc_xaq;
 	roc_sso_hwgrp_base_get;
 	roc_sso_hwgrp_hws_link_status;
-- 
2.8.4