From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E0463A0C46; Thu, 8 Apr 2021 22:49:31 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A87011411E3; Thu, 8 Apr 2021 22:49:31 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id ADFE01410B4 for ; Thu, 8 Apr 2021 22:49:30 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from shirik@nvidia.com) with SMTP; 8 Apr 2021 23:49:27 +0300 Received: from nvidia.com (c-236-0-60-063.mtl.labs.mlnx [10.236.0.63]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 138KnAJL028067; Thu, 8 Apr 2021 23:49:27 +0300 From: Shiri Kuzin To: dev@dpdk.org Cc: matan@nvidia.com, gakhil@marvell.com, suanmingm@nvidia.com, Dekel Peled Date: Thu, 8 Apr 2021 23:48:27 +0300 Message-Id: <20210408204849.9543-3-shirik@nvidia.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20210408204849.9543-1-shirik@nvidia.com> References: <1615447568-260965-1-git-send-email-matan@nvidia.com> <20210408204849.9543-1-shirik@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH 02/24] common/mlx5: update GENEVE TLV OPT obj name X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dekel Peled Rename MLX5_OBJ_TYPE_GENEVE_TLV_OPT as MLX5_GENERAL_OBJ_TYPE_GENEVE_TLV_OPT, to align with other general objects names. Signed-off-by: Dekel Peled Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_devx_cmds.c | 2 +- drivers/common/mlx5/mlx5_prm.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c index c90e020643..dfd2cb6af4 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.c +++ b/drivers/common/mlx5/mlx5_devx_cmds.c @@ -2176,7 +2176,7 @@ mlx5_devx_cmd_create_geneve_tlv_option(void *ctx, MLX5_SET(general_obj_in_cmd_hdr, hdr, opcode, MLX5_CMD_OP_CREATE_GENERAL_OBJECT); MLX5_SET(general_obj_in_cmd_hdr, hdr, obj_type, - MLX5_OBJ_TYPE_GENEVE_TLV_OPT); + MLX5_GENERAL_OBJ_TYPE_GENEVE_TLV_OPT); MLX5_SET(geneve_tlv_option, opt, option_class, rte_be_to_cpu_16(class)); MLX5_SET(geneve_tlv_option, opt, option_type, type); diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index f0a4f70d7d..e3ec4201c3 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -1106,7 +1106,7 @@ enum { #define MLX5_GENERAL_OBJ_TYPES_CAP_FLOW_HIT_ASO \ (1ULL << MLX5_GENERAL_OBJ_TYPE_FLOW_HIT_ASO) #define MLX5_GENERAL_OBJ_TYPES_CAP_GENEVE_TLV_OPT \ - (1ULL << MLX5_OBJ_TYPE_GENEVE_TLV_OPT) + (1ULL << MLX5_GENERAL_OBJ_TYPE_GENEVE_TLV_OPT) enum { MLX5_HCA_CAP_OPMOD_GET_MAX = 0, @@ -2383,7 +2383,7 @@ struct mlx5_ifc_create_cq_in_bits { }; enum { - MLX5_OBJ_TYPE_GENEVE_TLV_OPT = 0x000b, + MLX5_GENERAL_OBJ_TYPE_GENEVE_TLV_OPT = 0x000b, MLX5_GENERAL_OBJ_TYPE_VIRTQ = 0x000d, MLX5_GENERAL_OBJ_TYPE_VIRTIO_Q_COUNTERS = 0x001c, MLX5_GENERAL_OBJ_TYPE_FLEX_PARSE_GRAPH = 0x0022, -- 2.21.0