From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3E828A0524; Tue, 13 Apr 2021 02:11:01 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 087601608A9; Tue, 13 Apr 2021 02:10:46 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id 2A58116088D for ; Tue, 13 Apr 2021 02:10:40 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from lizh@nvidia.com) with SMTP; 13 Apr 2021 03:10:37 +0300 Received: from nvidia.com (c-235-17-1-009.mtl.labs.mlnx [10.235.17.9]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 13D0Abk7021795; Tue, 13 Apr 2021 03:10:37 +0300 From: Li Zhang To: dekelp@nvidia.com, orika@nvidia.com, viacheslavo@nvidia.com, matan@nvidia.com, shahafs@nvidia.com Cc: dev@dpdk.org, thomas@monjalon.net, rasland@nvidia.com, roniba@nvidia.com, Shun Hao Date: Tue, 13 Apr 2021 03:10:20 +0300 Message-Id: <20210413001033.1999355-3-lizh@nvidia.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20210413001033.1999355-1-lizh@nvidia.com> References: <20210331073632.1443011-1-lizh@nvidia.com> <20210413001033.1999355-1-lizh@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v3 02/14] common/mlx5: add color register idle bits definition X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Shun Hao 8 bits are used for meter color in meter register. When the meter register can be shared, the rest 24 bits can be used by others. This adds the definination for the 24 bits that can be shared. Signed-off-by: Shun Hao Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_prm.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 0ef0574f92..403ba80978 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -3382,6 +3382,12 @@ enum { /* The bits meter color use. */ #define MLX5_MTR_COLOR_BITS 8 +/* The bit size of one register. */ +#define MLX5_REG_BITS 32 + +/* Idle bits for non-color usage in color register. */ +#define MLX5_MTR_IDLE_BITS_IN_COLOR_REG (MLX5_REG_BITS - MLX5_MTR_COLOR_BITS) + /* Length mode of dynamic flex parser graph node. */ enum mlx5_parse_graph_node_len_mode { MLX5_GRAPH_NODE_LEN_FIXED = 0x0, -- 2.27.0