From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0CE05A0548; Wed, 21 Apr 2021 07:22:39 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7D42241932; Wed, 21 Apr 2021 07:22:38 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id D43EB4181F for ; Wed, 21 Apr 2021 07:22:36 +0200 (CEST) IronPort-SDR: ARhXR0IEMXehQK1ZAJ7MGqzmsMtL6UIcT/N7SYoF1rbZJRVuIMObo4jK3Jp47ypFO4P0Gv2dkK +vs6nlJaVi6A== X-IronPort-AV: E=McAfee;i="6200,9189,9960"; a="195197395" X-IronPort-AV: E=Sophos;i="5.82,238,1613462400"; d="scan'208";a="195197395" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Apr 2021 22:22:35 -0700 IronPort-SDR: FN2wKL3MoyhgaFYMGn+MQ3VUjBojKDxGiPJI+qxEjv/9XDb2C4mpeEUapZX+ftnFa2w2sA6m19 I0LNAqRq7Ojg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,238,1613462400"; d="scan'208";a="427380634" Received: from npg-dpdk-haiyue-1.sh.intel.com ([10.67.118.220]) by orsmga008.jf.intel.com with ESMTP; 20 Apr 2021 22:22:34 -0700 From: Haiyue Wang To: dev@dpdk.org Cc: qi.z.zhang@intel.com, liang-min.wang@intel.com, Haiyue Wang Date: Wed, 21 Apr 2021 13:02:40 +0800 Message-Id: <20210421050243.130585-1-haiyue.wang@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v1 0/3] Fix PF reset causes VF memory request failure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" By triggerring the VF reset from PF reset, echo 1 > /sys/bus/pci/devices/PF-BDF/reset the PCI bus master bit will cleared on VF, so the VF needs to enable this bit before restart. This patch set adds the API to enable PCI bus master. Haiyue Wang (3): bus/pci: enable PCI master in command register net/iavf: enable PCI bus master after reset net/i40e: enable PCI bus master after reset drivers/bus/pci/pci_common.c | 20 ++++++++++++++++++++ drivers/bus/pci/rte_bus_pci.h | 12 ++++++++++++ drivers/bus/pci/version.map | 1 + drivers/net/i40e/i40e_ethdev_vf.c | 7 ++++++- drivers/net/iavf/iavf_ethdev.c | 3 +++ lib/librte_pci/rte_pci.h | 4 ++++ 6 files changed, 46 insertions(+), 1 deletion(-) -- 2.31.1