From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7FF94A0547; Thu, 22 Apr 2021 03:38:00 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0456D41C08; Thu, 22 Apr 2021 03:38:00 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 5EBEA40150 for ; Thu, 22 Apr 2021 03:37:58 +0200 (CEST) IronPort-SDR: VQtTzboGGV7pJaHhF6WvZV/HtnvVlmuvRgOdkkM4gfK2lnt+0sv2wPdzsW5VgT1mOJ4G/DDl4P dS70CC+qDhog== X-IronPort-AV: E=McAfee;i="6200,9189,9961"; a="193689945" X-IronPort-AV: E=Sophos;i="5.82,241,1613462400"; d="scan'208";a="193689945" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2021 18:37:57 -0700 IronPort-SDR: ALMRpf6IjnhXLEfRT2SgSk0nCmq8aXnmSu/XjyTVTB7yQOCg5OV+RbyWwfi6s5rVGt1HeKyM++ I3VcKaJq9pAg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,241,1613462400"; d="scan'208";a="401672438" Received: from npg-dpdk-haiyue-1.sh.intel.com ([10.67.118.220]) by orsmga002.jf.intel.com with ESMTP; 21 Apr 2021 18:37:55 -0700 From: Haiyue Wang To: dev@dpdk.org Cc: qi.z.zhang@intel.com, liang-min.wang@intel.com, Haiyue Wang Date: Thu, 22 Apr 2021 09:18:27 +0800 Message-Id: <20210422011830.54199-1-haiyue.wang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210421050243.130585-1-haiyue.wang@intel.com> References: <20210421050243.130585-1-haiyue.wang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v2 0/3] fix PF reset causes VF memory request failure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" By triggerring the VF reset from PF reset, echo 1 > /sys/bus/pci/devices/PF-BDF/reset the PCI bus master bit will cleared on VF, so the VF needs to enable this bit before restart. This patch set adds the API to enable PCI bus master. v2: rebase to new librte directory path. Haiyue Wang (3): bus/pci: enable PCI master in command register net/iavf: enable PCI bus master after reset net/i40e: enable PCI bus master after reset drivers/bus/pci/pci_common.c | 20 ++++++++++++++++++++ drivers/bus/pci/rte_bus_pci.h | 12 ++++++++++++ drivers/bus/pci/version.map | 1 + drivers/net/i40e/i40e_ethdev_vf.c | 7 ++++++- drivers/net/iavf/iavf_ethdev.c | 3 +++ lib/pci/rte_pci.h | 4 ++++ 6 files changed, 46 insertions(+), 1 deletion(-) -- 2.31.1