From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4671AA0548; Mon, 26 Apr 2021 19:47:11 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9BF3041243; Mon, 26 Apr 2021 19:45:55 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 4FDB841246 for ; Mon, 26 Apr 2021 19:45:54 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 13QHiqZg030116 for ; Mon, 26 Apr 2021 10:45:53 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=neLj5tUhNmDoZnYOasAVler3LE2EGhREu2brl7a4tr8=; b=Qufr1mEzgBze8mzukt9sv8Iruh7DBr/ivQl2gzv8gmRYbPXatkJbJPS2mKa2I+BelgmQ 8X7+cVvzc71djEwSveXf3I+7GZ+FzGBZ63FLaOujr6F5FmGYKTW4YoNexO9kiDEDJ1Pm qfiBbddP80LL5e+llWl003/fe6c5lcvDx8AqSSARnvQtebjnfHFbiUO1GNarF9IJkkDx ksx+Jc+W3BMpzMwM496ocCAQ8qFSCwjKP9T65IDhHIR2MhwdqnT9upkq5MmsniO8JCdr uG1afUe1L3JuU+9Fh4J3jA8SjvOZsninSja8xHw2tOPyWJpt79rJmr55pCg0tPj2wV0g 3Q== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 385tvvhdg6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 26 Apr 2021 10:45:53 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 26 Apr 2021 10:45:51 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 26 Apr 2021 10:45:51 -0700 Received: from BG-LT7430.marvell.com (BG-LT7430.marvell.com [10.28.177.176]) by maili.marvell.com (Postfix) with ESMTP id C6D215B6C96; Mon, 26 Apr 2021 10:45:49 -0700 (PDT) From: To: , Pavan Nikhilesh , "Shijith Thotton" CC: Date: Mon, 26 Apr 2021 23:14:24 +0530 Message-ID: <20210426174441.2302-18-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210426174441.2302-1-pbhagavatula@marvell.com> References: <20210306162942.6845-1-pbhagavatula@marvell.com> <20210426174441.2302-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: Hi6k_tU_ei2i082Exje0DuRcouvWXw02 X-Proofpoint-ORIG-GUID: Hi6k_tU_ei2i082Exje0DuRcouvWXw02 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-04-26_09:2021-04-26, 2021-04-26 signatures=0 Subject: [dpdk-dev] [PATCH v2 17/33] event/cnxk: add device stop and close functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Shijith Thotton Add event device stop and close callback functions. Signed-off-by: Pavan Nikhilesh Signed-off-by: Shijith Thotton --- drivers/event/cnxk/cn10k_eventdev.c | 15 +++++++++ drivers/event/cnxk/cn9k_eventdev.c | 14 +++++++++ drivers/event/cnxk/cnxk_eventdev.c | 48 +++++++++++++++++++++++++++++ drivers/event/cnxk/cnxk_eventdev.h | 6 ++++ 4 files changed, 83 insertions(+) diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c index 0de44ed43..6a0b9bcd9 100644 --- a/drivers/event/cnxk/cn10k_eventdev.c +++ b/drivers/event/cnxk/cn10k_eventdev.c @@ -388,6 +388,19 @@ cn10k_sso_start(struct rte_eventdev *event_dev) return rc; } +static void +cn10k_sso_stop(struct rte_eventdev *event_dev) +{ + cnxk_sso_stop(event_dev, cn10k_sso_hws_reset, + cn10k_sso_hws_flush_events); +} + +static int +cn10k_sso_close(struct rte_eventdev *event_dev) +{ + return cnxk_sso_close(event_dev, cn10k_sso_hws_unlink); +} + static struct rte_eventdev_ops cn10k_sso_dev_ops = { .dev_infos_get = cn10k_sso_info_get, .dev_configure = cn10k_sso_dev_configure, @@ -402,6 +415,8 @@ static struct rte_eventdev_ops cn10k_sso_dev_ops = { .timeout_ticks = cnxk_sso_timeout_ticks, .dev_start = cn10k_sso_start, + .dev_stop = cn10k_sso_stop, + .dev_close = cn10k_sso_close, }; static int diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c index 39f29b687..195ed49d8 100644 --- a/drivers/event/cnxk/cn9k_eventdev.c +++ b/drivers/event/cnxk/cn9k_eventdev.c @@ -463,6 +463,18 @@ cn9k_sso_start(struct rte_eventdev *event_dev) return rc; } +static void +cn9k_sso_stop(struct rte_eventdev *event_dev) +{ + cnxk_sso_stop(event_dev, cn9k_sso_hws_reset, cn9k_sso_hws_flush_events); +} + +static int +cn9k_sso_close(struct rte_eventdev *event_dev) +{ + return cnxk_sso_close(event_dev, cn9k_sso_hws_unlink); +} + static struct rte_eventdev_ops cn9k_sso_dev_ops = { .dev_infos_get = cn9k_sso_info_get, .dev_configure = cn9k_sso_dev_configure, @@ -477,6 +489,8 @@ static struct rte_eventdev_ops cn9k_sso_dev_ops = { .timeout_ticks = cnxk_sso_timeout_ticks, .dev_start = cn9k_sso_start, + .dev_stop = cn9k_sso_stop, + .dev_close = cn9k_sso_close, }; static int diff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c index 0059b0eca..01685633d 100644 --- a/drivers/event/cnxk/cnxk_eventdev.c +++ b/drivers/event/cnxk/cnxk_eventdev.c @@ -390,6 +390,54 @@ cnxk_sso_start(struct rte_eventdev *event_dev, cnxk_sso_hws_reset_t reset_fn, return 0; } +void +cnxk_sso_stop(struct rte_eventdev *event_dev, cnxk_sso_hws_reset_t reset_fn, + cnxk_sso_hws_flush_t flush_fn) +{ + plt_sso_dbg(); + cnxk_sso_cleanup(event_dev, reset_fn, flush_fn, false); + rte_mb(); +} + +int +cnxk_sso_close(struct rte_eventdev *event_dev, cnxk_sso_unlink_t unlink_fn) +{ + struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); + uint16_t all_queues[CNXK_SSO_MAX_HWGRP]; + uint16_t i; + void *ws; + + if (!dev->configured) + return 0; + + for (i = 0; i < dev->nb_event_queues; i++) + all_queues[i] = i; + + for (i = 0; i < dev->nb_event_ports; i++) { + ws = event_dev->data->ports[i]; + unlink_fn(dev, ws, all_queues, dev->nb_event_queues); + rte_free(cnxk_sso_hws_get_cookie(ws)); + event_dev->data->ports[i] = NULL; + } + + roc_sso_rsrc_fini(&dev->sso); + rte_mempool_free(dev->xaq_pool); + rte_memzone_free(rte_memzone_lookup(CNXK_SSO_FC_NAME)); + + dev->fc_iova = 0; + dev->fc_mem = NULL; + dev->xaq_pool = NULL; + dev->configured = false; + dev->is_timeout_deq = 0; + dev->nb_event_ports = 0; + dev->max_num_events = -1; + dev->nb_event_queues = 0; + dev->min_dequeue_timeout_ns = USEC2NSEC(1); + dev->max_dequeue_timeout_ns = USEC2NSEC(0x3FF); + + return 0; +} + static void parse_queue_param(char *value, void *opaque) { diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h index 6ead171c0..1030d5840 100644 --- a/drivers/event/cnxk/cnxk_eventdev.h +++ b/drivers/event/cnxk/cnxk_eventdev.h @@ -48,6 +48,8 @@ typedef void (*cnxk_sso_hws_setup_t)(void *dev, void *ws, uintptr_t *grp_base); typedef void (*cnxk_sso_hws_release_t)(void *dev, void *ws); typedef int (*cnxk_sso_link_t)(void *dev, void *ws, uint16_t *map, uint16_t nb_link); +typedef int (*cnxk_sso_unlink_t)(void *dev, void *ws, uint16_t *map, + uint16_t nb_link); typedef void (*cnxk_handle_event_t)(void *arg, struct rte_event ev); typedef void (*cnxk_sso_hws_reset_t)(void *arg, void *ws); typedef void (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base, @@ -205,5 +207,9 @@ int cnxk_sso_timeout_ticks(struct rte_eventdev *event_dev, uint64_t ns, int cnxk_sso_start(struct rte_eventdev *event_dev, cnxk_sso_hws_reset_t reset_fn, cnxk_sso_hws_flush_t flush_fn); +void cnxk_sso_stop(struct rte_eventdev *event_dev, + cnxk_sso_hws_reset_t reset_fn, + cnxk_sso_hws_flush_t flush_fn); +int cnxk_sso_close(struct rte_eventdev *event_dev, cnxk_sso_unlink_t unlink_fn); #endif /* __CNXK_EVENTDEV_H__ */ -- 2.17.1