From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C81A7A0A02; Tue, 27 Apr 2021 16:05:20 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7F73C4124C; Tue, 27 Apr 2021 16:05:20 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id 27D1C410FC for ; Tue, 27 Apr 2021 16:05:18 +0200 (CEST) IronPort-SDR: MgepQFyBR7FTe9kkAiD8heuwLVblUafQ8LYfbeyol64h/W6xU4UrBJFM5jO/eCZ9435qvGw0DQ XlxiM5LqlqDw== X-IronPort-AV: E=McAfee;i="6200,9189,9967"; a="183994820" X-IronPort-AV: E=Sophos;i="5.82,254,1613462400"; d="scan'208";a="183994820" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2021 07:05:17 -0700 IronPort-SDR: hgWpQZTrAe/1HYkdk6/sSYiUTj/pA0reyWmjKxNWt2zt0ArvU++6oOh/Fpk4bYbt6OrPVMHmx3 DlL03jEUzBfQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,254,1613462400"; d="scan'208";a="457656350" Received: from npg-dpdk-haiyue-2.sh.intel.com ([10.67.119.63]) by fmsmga002.fm.intel.com with ESMTP; 27 Apr 2021 07:05:15 -0700 From: Haiyue Wang To: dev@dpdk.org Cc: qi.z.zhang@intel.com, liang-min.wang@intel.com, david.marchand@redhat.com, Haiyue Wang Date: Tue, 27 Apr 2021 21:39:09 +0800 Message-Id: <20210427133912.261993-1-haiyue.wang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210421050243.130585-1-haiyue.wang@intel.com> References: <20210421050243.130585-1-haiyue.wang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v4 0/3] fix PF reset causes VF memory request failure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" By triggerring the VF reset from PF reset, echo 1 > /sys/bus/pci/devices/PF-BDF/reset the PCI bus master bit will cleared on VF, so the VF needs to enable this bit before restart. This patch set adds the API to enable PCI bus master. v4: change the API to set type, so can enable or disable v3: added the missed annotate symbol add time v2: rebase to new librte directory path. Haiyue Wang (3): bus/pci: set PCI master in command register net/iavf: enable PCI bus master after reset net/i40e: enable PCI bus master after reset drivers/bus/pci/pci_common.c | 28 ++++++++++++++++++++++++++++ drivers/bus/pci/rte_bus_pci.h | 14 ++++++++++++++ drivers/bus/pci/version.map | 3 +++ drivers/net/i40e/i40e_ethdev_vf.c | 7 ++++++- drivers/net/iavf/iavf_ethdev.c | 3 +++ lib/pci/rte_pci.h | 4 ++++ 6 files changed, 58 insertions(+), 1 deletion(-) -- 2.31.1