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From: Haiyue Wang <haiyue.wang@intel.com>
To: dev@dpdk.org
Cc: qi.z.zhang@intel.com, liang-min.wang@intel.com, david.marchand@redhat.com,
Haiyue Wang <haiyue.wang@intel.com>, Ray Kinsella <mdr@ashroe.eu>,
Neil Horman <nhorman@tuxdriver.com>, Gaetan Rivet <grive@u256.net>
Date: Tue, 27 Apr 2021 21:39:10 +0800
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Subject: [dpdk-dev] [PATCH v4 1/3] bus/pci: set PCI master in command
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Add the API to set 'Bus Master Enable' bit to be enabled or disabled in
the PCI command register.
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
---
drivers/bus/pci/pci_common.c | 28 ++++++++++++++++++++++++++++
drivers/bus/pci/rte_bus_pci.h | 14 ++++++++++++++
drivers/bus/pci/version.map | 3 +++
lib/pci/rte_pci.h | 4 ++++
4 files changed, 49 insertions(+)
diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c
index ee7f96635..35d7d092d 100644
--- a/drivers/bus/pci/pci_common.c
+++ b/drivers/bus/pci/pci_common.c
@@ -746,6 +746,34 @@ rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap)
return 0;
}
+int
+rte_pci_set_bus_master(struct rte_pci_device *dev, bool enable)
+{
+ uint16_t old_cmd, cmd;
+
+ if (rte_pci_read_config(dev, &old_cmd, sizeof(old_cmd),
+ RTE_PCI_COMMAND) < 0) {
+ RTE_LOG(ERR, EAL, "error in reading PCI command register\n");
+ return -1;
+ }
+
+ if (enable)
+ cmd = old_cmd | RTE_PCI_COMMAND_MASTER;
+ else
+ cmd = old_cmd & ~RTE_PCI_COMMAND_MASTER;
+
+ if (cmd == old_cmd)
+ return 0;
+
+ if (rte_pci_write_config(dev, &cmd, sizeof(cmd),
+ RTE_PCI_COMMAND) < 0) {
+ RTE_LOG(ERR, EAL, "error in writing PCI command register\n");
+ return -1;
+ }
+
+ return 0;
+}
+
struct rte_pci_bus rte_pci_bus = {
.bus = {
.scan = rte_pci_scan,
diff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h
index 64886b473..976c33c92 100644
--- a/drivers/bus/pci/rte_bus_pci.h
+++ b/drivers/bus/pci/rte_bus_pci.h
@@ -249,6 +249,20 @@ void rte_pci_dump(FILE *f);
__rte_experimental
off_t rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap);
+/**
+ * Enables/Disables Bus Master for device's PCI command register.
+ *
+ * @param dev
+ * A pointer to rte_pci_device structure.
+ * @param enable
+ * Enable or disable Bus Master.
+ *
+ * @return
+ * 0 on success, -1 on error in PCI config space read/write.
+ */
+__rte_experimental
+int rte_pci_set_bus_master(struct rte_pci_device *dev, bool enable);
+
/**
* Register a PCI driver.
*
diff --git a/drivers/bus/pci/version.map b/drivers/bus/pci/version.map
index f33ed0abd..c6e5f797c 100644
--- a/drivers/bus/pci/version.map
+++ b/drivers/bus/pci/version.map
@@ -21,4 +21,7 @@ EXPERIMENTAL {
global:
rte_pci_find_ext_capability;
+
+ # added in 21.05
+ rte_pci_set_bus_master;
};
diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
index a8f8e404a..1f33d687f 100644
--- a/lib/pci/rte_pci.h
+++ b/lib/pci/rte_pci.h
@@ -32,6 +32,10 @@ extern "C" {
#define RTE_PCI_VENDOR_ID 0x00 /* 16 bits */
#define RTE_PCI_DEVICE_ID 0x02 /* 16 bits */
+#define RTE_PCI_COMMAND 0x04 /* 16 bits */
+
+/* PCI Command Register */
+#define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */
/* PCI Express capability registers */
#define RTE_PCI_EXP_DEVCTL 8 /* Device Control */
--
2.31.1