From: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
To: <dev@dpdk.org>
Cc: <rasland@nvidia.com>, <matan@nvidia.com>, <stable@dpdk.org>
Subject: [dpdk-dev] [PATCH] net/mlx5: fix Tx queue doorbell record field offset
Date: Wed, 28 Apr 2021 12:18:19 +0300 [thread overview]
Message-ID: <20210428091819.13306-1-viacheslavo@nvidia.com> (raw)
If the Send Queue (backing one for PMD Tx queue) the was
created with DevX API the doorbell record offset for the
producer index field was incorrect. If hardware missed the
doorbell register write event the wrong content of doorbell
record might cause queue malfunction. For the Send Queues
created with Verbs API the doorbell record offset was
configured correctly.
Fixes: 86d259cec852 ("net/mlx5: separate Tx queue object creations")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
drivers/net/mlx5/mlx5_devx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c
index 76d31f5539..531a81d7fa 100644
--- a/drivers/net/mlx5/mlx5_devx.c
+++ b/drivers/net/mlx5/mlx5_devx.c
@@ -1113,7 +1113,7 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
txq_data->wqe_pi = 0;
txq_data->wqe_comp = 0;
txq_data->wqe_thres = txq_data->wqe_s / MLX5_TX_COMP_THRESH_INLINE_DIV;
- txq_data->qp_db = txq_obj->sq_obj.db_rec;
+ txq_data->qp_db = &txq_obj->sq_obj.db_rec[MLX5_SND_DBR];
*txq_data->qp_db = 0;
txq_data->qp_num_8s = txq_obj->sq_obj.sq->id << 8;
/* Change Send Queue state to Ready-to-Send. */
--
2.18.1
next reply other threads:[~2021-04-28 9:18 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-28 9:18 Viacheslav Ovsiienko [this message]
2021-05-09 12:26 ` Raslan Darawsheh
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