From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0901CA0562; Tue, 4 May 2021 02:30:31 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7651D410F7; Tue, 4 May 2021 02:29:10 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 7AD6F411AE for ; Tue, 4 May 2021 02:29:09 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 1440Ouk0025116 for ; Mon, 3 May 2021 17:29:08 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=FY6E2+vjKgzWOKVqU5VJqSugEMHYVkbSQ6veVgpuieI=; b=FQFt3P+C1XIDWWjFHlfAUvNGTPg07r+tIW3AYGV1tfvnw1N65Xx4YFSUywvNowhrE55D XtoxHMoKa1gqg9MhRLFVswfrljDBaJdX6wLCBf6WiRUlK2gerGvqBodmACVFLFF6rMC7 kgXKbyyNWUu+RXQNpziXFPRcsD+c5qeHD5dqf8AcjhiBZlY6FhxBhuvh+fVarKe3qC6s YVvRNpxj7g0IC5W1no3Kv4XUAlZLMU/vK13Qj5zVGvo7eSKQfNLuzSGJheNzON06Aq1X GMmA/SpeDjgXgGEP5qNXjygqII+hndNoP5lbziApqPFieXoxV71Q3QSY1xVH+1DqaHYw dg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 38agtfjnsh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 03 May 2021 17:29:08 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 3 May 2021 17:29:05 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 3 May 2021 17:29:06 -0700 Received: from BG-LT7430.marvell.com (unknown [10.193.86.144]) by maili.marvell.com (Postfix) with ESMTP id C6C653F7045; Mon, 3 May 2021 17:29:04 -0700 (PDT) From: To: , Pavan Nikhilesh , "Shijith Thotton" CC: Date: Tue, 4 May 2021 05:57:13 +0530 Message-ID: <20210504002726.525-24-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210504002726.525-1-pbhagavatula@marvell.com> References: <20210503152238.2437-1-pbhagavatula@marvell.com> <20210504002726.525-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: Xp5EG5oulQtfdOuVlP2BJMcZgX8lxTkz X-Proofpoint-ORIG-GUID: Xp5EG5oulQtfdOuVlP2BJMcZgX8lxTkz X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-03_20:2021-05-03, 2021-05-03 signatures=0 Subject: [dpdk-dev] [PATCH v5 23/35] event/cnxk: add timer adapter capabilities X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Shijith Thotton Add function to retrieve event timer adapter capabilities. Signed-off-by: Pavan Nikhilesh Signed-off-by: Shijith Thotton --- drivers/event/cnxk/cn10k_eventdev.c | 2 ++ drivers/event/cnxk/cn9k_eventdev.c | 2 ++ drivers/event/cnxk/cnxk_tim_evdev.c | 22 +++++++++++++++++++++- drivers/event/cnxk/cnxk_tim_evdev.h | 6 +++++- 4 files changed, 30 insertions(+), 2 deletions(-) diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c index a0c6d32cc..0981085e8 100644 --- a/drivers/event/cnxk/cn10k_eventdev.c +++ b/drivers/event/cnxk/cn10k_eventdev.c @@ -420,6 +420,8 @@ static struct rte_eventdev_ops cn10k_sso_dev_ops = { .port_unlink = cn10k_sso_port_unlink, .timeout_ticks = cnxk_sso_timeout_ticks, + .timer_adapter_caps_get = cnxk_tim_caps_get, + .dump = cnxk_sso_dump, .dev_start = cn10k_sso_start, .dev_stop = cn10k_sso_stop, diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c index 48991e522..d9882ebb9 100644 --- a/drivers/event/cnxk/cn9k_eventdev.c +++ b/drivers/event/cnxk/cn9k_eventdev.c @@ -494,6 +494,8 @@ static struct rte_eventdev_ops cn9k_sso_dev_ops = { .port_unlink = cn9k_sso_port_unlink, .timeout_ticks = cnxk_sso_timeout_ticks, + .timer_adapter_caps_get = cnxk_tim_caps_get, + .dump = cnxk_sso_dump, .dev_start = cn9k_sso_start, .dev_stop = cn9k_sso_stop, diff --git a/drivers/event/cnxk/cnxk_tim_evdev.c b/drivers/event/cnxk/cnxk_tim_evdev.c index 46461b885..265bee533 100644 --- a/drivers/event/cnxk/cnxk_tim_evdev.c +++ b/drivers/event/cnxk/cnxk_tim_evdev.c @@ -5,6 +5,26 @@ #include "cnxk_eventdev.h" #include "cnxk_tim_evdev.h" +int +cnxk_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags, + uint32_t *caps, + const struct rte_event_timer_adapter_ops **ops) +{ + struct cnxk_tim_evdev *dev = cnxk_tim_priv_get(); + + RTE_SET_USED(flags); + RTE_SET_USED(ops); + + if (dev == NULL) + return -ENODEV; + + /* Store evdev pointer for later use. */ + dev->event_dev = (struct rte_eventdev *)(uintptr_t)evdev; + *caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT; + + return 0; +} + void cnxk_tim_init(struct roc_sso *sso) { @@ -37,7 +57,7 @@ cnxk_tim_init(struct roc_sso *sso) void cnxk_tim_fini(void) { - struct cnxk_tim_evdev *dev = tim_priv_get(); + struct cnxk_tim_evdev *dev = cnxk_tim_priv_get(); if (rte_eal_process_type() != RTE_PROC_PRIMARY) return; diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h index 5ddc94ed4..ece66ab25 100644 --- a/drivers/event/cnxk/cnxk_tim_evdev.h +++ b/drivers/event/cnxk/cnxk_tim_evdev.h @@ -27,7 +27,7 @@ struct cnxk_tim_evdev { }; static inline struct cnxk_tim_evdev * -tim_priv_get(void) +cnxk_tim_priv_get(void) { const struct rte_memzone *mz; @@ -38,6 +38,10 @@ tim_priv_get(void) return mz->addr; } +int cnxk_tim_caps_get(const struct rte_eventdev *dev, uint64_t flags, + uint32_t *caps, + const struct rte_event_timer_adapter_ops **ops); + void cnxk_tim_init(struct roc_sso *sso); void cnxk_tim_fini(void); -- 2.17.1