From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8879EA0A02; Tue, 4 May 2021 23:09:42 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 136A1410F6; Tue, 4 May 2021 23:09:32 +0200 (CEST) Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2044.outbound.protection.outlook.com [40.107.93.44]) by mails.dpdk.org (Postfix) with ESMTP id BBE65410F7 for ; Tue, 4 May 2021 23:09:30 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=WPGTLyqMRD2n6ckuN8vsUPk1kOlpCB2vVE2z1U/K+rssJCc+NKdRYMJBZRy6eBEuX7bdmikID2E+6xOFgg77SqlQF3NGmAu+y7w4CwuFVK43FecsZrFp9hXo4KCr7Azi82Y++Dx9NE7yzCBvlM3Pkh14Ipx9Vzv6oroFKnNTULw6iY0i7hJs1PCCUk+KqMFaLvtgAih3kZCUxYk1VzMUnsgnI57OW+9ipKwcfV9fLmVnJ7te7VO/j2COACHYC3RODDlXBeFAF/lPM+tzIGoDA7vJDAnau6DMUHGCnWo0i5/qL4Ul5RC2UsEd/o9hECg1gZh+7CTTrEIV6j/4q9xBGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ZcoJrrI3OO8rHoXkx7Mqw/LQ59znRF+w62Cb9E7Bzdk=; b=Zf4V6X5+WyuQPAlQDzvh/YrheKJgCdAswNE2F0SPc3iCUCVXwMyZyjYQxjNhczG6U9Ynd9cWQV/NTNrZxKYehmEt6p0WyaFLocDUVQugNAgclHMdRKNi1H9ceYVYuwqtJGMAZ920gggvcPt2mB47WaqaciO1enRWSmhJhExrgvgF2jJ6+SxfezBSoU7RquNnF2P4lNz3IqLfXxA5aNfVox0I2j7uiM7x64fscIwwA29E7c7L4zk3udU7evf3TjHGVtWyDFgckCWaDYZEvJlS/0n+C73LZuR+YrkzbEoUCmqz5SGSKur7ALOkaJagcYEhpmPGq2GO++mifNZs/LhtyA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.112.34) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ZcoJrrI3OO8rHoXkx7Mqw/LQ59znRF+w62Cb9E7Bzdk=; b=qkG31wFFSOzvc05yuiIkwciB7ug3SFtZUL7OjaoyQtTZAWirxZu+0c1JyfQVyzKlPaDhN+BownZcfws/BM9UhqMltUsj4sGmdAxOCPrk25bOjyoOvzuvOxX7PFVnJ4mMmXkH0QfgCRSSi7Q0YfU000Uet2Rtv9Mh4dU3rhylmrm930JK812RqYMRNc2uE2Oa4xFfO3MZgTH+/F/miYWltm9q8vuhi3+1BsYHTgUhwx2qtAvtxuaBBqMplo85v+24dIp7sltwfivdXPbOjxvQEq9yRukLpb8k3AfQCseBUl0l7MQ05sigCh2Fjy8RSfABzbqBYgu/KV3gSjdEU9UAiQ== Received: from MWHPR18CA0036.namprd18.prod.outlook.com (2603:10b6:320:31::22) by MW2PR12MB2394.namprd12.prod.outlook.com (2603:10b6:907:f::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4087.35; Tue, 4 May 2021 21:09:29 +0000 Received: from CO1NAM11FT057.eop-nam11.prod.protection.outlook.com (2603:10b6:320:31:cafe::eb) by MWHPR18CA0036.outlook.office365.com (2603:10b6:320:31::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4087.27 via Frontend Transport; Tue, 4 May 2021 21:09:29 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34) smtp.mailfrom=nvidia.com; monjalon.net; dkim=none (message not signed) header.d=none;monjalon.net; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT057.mail.protection.outlook.com (10.13.174.205) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4087.27 via Frontend Transport; Tue, 4 May 2021 21:09:29 +0000 Received: from nvidia.com (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 4 May 2021 21:09:25 +0000 From: Matan Azrad To: CC: , , , "Thomas Monjalon" , Shiri Kuzin Date: Wed, 5 May 2021 00:08:45 +0300 Message-ID: <20210504210857.3398397-4-matan@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210504210857.3398397-1-matan@nvidia.com> References: <20210429154712.2820159-1-matan@nvidia.com> <20210504210857.3398397-1-matan@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 6fcb82a6-7d70-43a8-72eb-08d90f40e7d9 X-MS-TrafficTypeDiagnostic: MW2PR12MB2394: X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4303; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: h5oz6mXQToGfybP0CWG/chUz2p5mMXZlZuNTRA6JkBDfGj7BKtdq0tyW9lq8oKyNpfjv+rzc06P0zzomDOW+cZDk42vyWbXfLc5hc+qadNkYQfGC17qvqhpVv7ydHDbdrmuy3thktU6a3AEzkyFsVbm15EfRzJP6tOqMXnIxWWU8WJn9PJNrhYvCfv843BkrS4GWgHokNFtgdVLGqOqyCl9EDEFJZ2p9K2Bu6K1/YSjV1ZKfez4dyRZYFzo2Y+Y0vnDIFXg14uYUXQhicFMz/o2G7U0lkPg8uINTOm+XdFrsM9aC+WFkn33ulM3rR2GaDo7gfuoQ5kXsqL5XvjPWn0lQRauedHZwdnu/d4NS8tgL/jIpF5/Zkz+FUWdOFf8g+9vg/RQKUVvMxwyNxcjY82qc6ZgmgqvEdmJ/9zwpId00hDMBWUUrv7q5NGjV5YFIWUZ+vuDfbxoaUyeSBbVfnJ5w+XxSG464y72/MVW14u5+mfY8GJkw16ERJpkMqes4GNTpsm0qOr2mKL3jL2d0foaM0U/yWAtaPNYuTA2rtvf9aK7rrnTBTRwKUm6x8P/paWJs4tM5p4dBD9XtMSXvQa2UVd4CY3x/Smz+HCsfQgbqV3u7FBbodACg4HoxITpXiaS60hhFiNFFeSHB3dTHGsvtWQwJI7OwvBCaOe+gZAU= X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(39860400002)(396003)(136003)(376002)(346002)(36840700001)(46966006)(26005)(186003)(107886003)(426003)(356005)(83380400001)(336012)(16526019)(2906002)(8936002)(6286002)(4326008)(2616005)(86362001)(82310400003)(70206006)(1076003)(8676002)(6916009)(55016002)(36756003)(36860700001)(7696005)(316002)(54906003)(6666004)(36906005)(47076005)(5660300002)(82740400003)(7636003)(70586007)(478600001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 May 2021 21:09:29.0707 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6fcb82a6-7d70-43a8-72eb-08d90f40e7d9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT057.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR12MB2394 Subject: [dpdk-dev] [PATCH v3 03/15] crypto/mlx5: support session operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Shiri Kuzin Sessions are used in symmetric transformations in order to prepare objects and data for packet processing stage. A mlx5 session includes iv_offset, pointer to mlx5_crypto_dek struct, bsf_size, bsf_p_type, encryption_order and encryption standard. Implement the next session operations: mlx5_crypto_sym_session_get_size- returns the size of the mlx5 session struct. mlx5_crypto_sym_session_configure- prepares the DEK hash-list and saves all the session data. mlx5_crypto_sym_session_clear - destroys the DEK hash-list. Signed-off-by: Shiri Kuzin Acked-by: Matan Azrad --- drivers/crypto/mlx5/mlx5_crypto.c | 96 ++++++++++++++++++++++++++++++- 1 file changed, 93 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c index 2bdfb1a10f..32f5077066 100644 --- a/drivers/crypto/mlx5/mlx5_crypto.c +++ b/drivers/crypto/mlx5/mlx5_crypto.c @@ -3,6 +3,7 @@ */ #include +#include #include #include #include @@ -36,6 +37,24 @@ static const struct rte_driver mlx5_drv = { static struct cryptodev_driver mlx5_cryptodev_driver; +struct mlx5_crypto_session { + uint32_t bs_bpt_eo_es; + /* + * bsf_size, bsf_p_type, encryption_order and encryption standard, + * saved in big endian format. + */ + uint32_t iv_offset:16; + /* Starting point for Initialisation Vector. */ + struct mlx5_crypto_dek *dek; /* Pointer to dek struct. */ + uint32_t dek_id; /* DEK ID */ +} __rte_packed; + +static unsigned int +mlx5_crypto_sym_session_get_size(struct rte_cryptodev *dev __rte_unused) +{ + return sizeof(struct mlx5_crypto_session); +} + static int mlx5_crypto_dev_configure(struct rte_cryptodev *dev, struct rte_cryptodev_config *config __rte_unused) @@ -58,6 +77,77 @@ mlx5_crypto_dev_close(struct rte_cryptodev *dev) return 0; } +static int +mlx5_crypto_sym_session_configure(struct rte_cryptodev *dev, + struct rte_crypto_sym_xform *xform, + struct rte_cryptodev_sym_session *session, + struct rte_mempool *mp) +{ + struct mlx5_crypto_priv *priv = dev->data->dev_private; + struct mlx5_crypto_session *sess_private_data; + struct rte_crypto_cipher_xform *cipher; + uint8_t encryption_order; + int ret; + + if (unlikely(xform->next != NULL)) { + DRV_LOG(ERR, "Xform next is not supported."); + return -ENOTSUP; + } + if (unlikely((xform->type != RTE_CRYPTO_SYM_XFORM_CIPHER) || + (xform->cipher.algo != RTE_CRYPTO_CIPHER_AES_XTS))) { + DRV_LOG(ERR, "Only AES-XTS algorithm is supported."); + return -ENOTSUP; + } + ret = rte_mempool_get(mp, (void *)&sess_private_data); + if (ret != 0) { + DRV_LOG(ERR, + "Failed to get session %p private data from mempool.", + sess_private_data); + return -ENOMEM; + } + cipher = &xform->cipher; + sess_private_data->dek = mlx5_crypto_dek_prepare(priv, cipher); + if (sess_private_data->dek == NULL) { + rte_mempool_put(mp, sess_private_data); + DRV_LOG(ERR, "Failed to prepare dek."); + return -ENOMEM; + } + if (cipher->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) + encryption_order = MLX5_ENCRYPTION_ORDER_ENCRYPTED_RAW_MEMORY; + else + encryption_order = MLX5_ENCRYPTION_ORDER_ENCRYPTED_RAW_WIRE; + sess_private_data->bs_bpt_eo_es = rte_cpu_to_be_32 + (MLX5_BSF_SIZE_64B << MLX5_BSF_SIZE_OFFSET | + MLX5_BSF_P_TYPE_CRYPTO << MLX5_BSF_P_TYPE_OFFSET | + encryption_order << MLX5_ENCRYPTION_ORDER_OFFSET | + MLX5_ENCRYPTION_STANDARD_AES_XTS); + sess_private_data->iv_offset = cipher->iv.offset; + sess_private_data->dek_id = + rte_cpu_to_be_32(sess_private_data->dek->obj->id & + 0xffffff); + set_sym_session_private_data(session, dev->driver_id, + sess_private_data); + DRV_LOG(DEBUG, "Session %p was configured.", sess_private_data); + return 0; +} + +static void +mlx5_crypto_sym_session_clear(struct rte_cryptodev *dev, + struct rte_cryptodev_sym_session *sess) +{ + struct mlx5_crypto_priv *priv = dev->data->dev_private; + struct mlx5_crypto_session *sess_private_data = + get_sym_session_private_data(sess, dev->driver_id); + + if (unlikely(sess_private_data == NULL)) { + DRV_LOG(ERR, "Failed to get session %p private data.", + sess_private_data); + return; + } + mlx5_crypto_dek_destroy(priv, sess_private_data->dek); + DRV_LOG(DEBUG, "Session %p was cleared.", sess_private_data); +} + static struct rte_cryptodev_ops mlx5_crypto_ops = { .dev_configure = mlx5_crypto_dev_configure, .dev_start = NULL, @@ -68,9 +158,9 @@ static struct rte_cryptodev_ops mlx5_crypto_ops = { .stats_reset = NULL, .queue_pair_setup = NULL, .queue_pair_release = NULL, - .sym_session_get_size = NULL, - .sym_session_configure = NULL, - .sym_session_clear = NULL, + .sym_session_get_size = mlx5_crypto_sym_session_get_size, + .sym_session_configure = mlx5_crypto_sym_session_configure, + .sym_session_clear = mlx5_crypto_sym_session_clear, .sym_get_raw_dp_ctx_size = NULL, .sym_configure_raw_dp_ctx = NULL, }; -- 2.25.1