From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B52D4A0524; Thu, 6 May 2021 06:10:20 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 731F3410DB; Thu, 6 May 2021 06:10:20 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mails.dpdk.org (Postfix) with ESMTP id B80F740040 for ; Thu, 6 May 2021 06:10:18 +0200 (CEST) IronPort-SDR: rud6zzOUjrN2UpRNDGTsmbNhAbJkDaf2aRGBcOLgwzzI4DQgry1lFgXPjvP/hpWwKN7m2OHUwp 2pHn8xcGvlbw== X-IronPort-AV: E=McAfee;i="6200,9189,9975"; a="195251302" X-IronPort-AV: E=Sophos;i="5.82,276,1613462400"; d="scan'208";a="195251302" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 May 2021 21:10:15 -0700 IronPort-SDR: riT3dfhCdLpvNYFwUV/qKLKjZT7JNifDGlOsl6oXwIL0Nz5tFoZoCDyYJd7SLInvlzJT4WJ1lx W07MIbSYQluw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,276,1613462400"; d="scan'208";a="434147056" Received: from npg-dpdk-haiyue-1.sh.intel.com ([10.67.118.220]) by orsmga008.jf.intel.com with ESMTP; 05 May 2021 21:10:14 -0700 From: Haiyue Wang To: dev@dpdk.org Cc: qi.z.zhang@intel.com, liang-min.wang@intel.com, david.marchand@redhat.com, Haiyue Wang Date: Thu, 6 May 2021 11:49:54 +0800 Message-Id: <20210506034957.46458-1-haiyue.wang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210421050243.130585-1-haiyue.wang@intel.com> References: <20210421050243.130585-1-haiyue.wang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v5 0/3] fix PF reset causes VF memory request failure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" By triggerring the VF reset from PF reset, echo 1 > /sys/bus/pci/devices/PF-BDF/reset the PCI bus master bit will cleared on VF, so the VF needs to enable this bit before restart. This patch set adds the API to enable PCI bus master. v5: error handling if bus master enable failed v4: change the API to set type, so can enable or disable v3: added the missed annotate symbol add time v2: rebase to new librte directory path Haiyue Wang (3): bus/pci: set PCI master in command register net/iavf: enable PCI bus master after reset net/i40e: enable PCI bus master after reset drivers/bus/pci/pci_common.c | 28 ++++++++++++++++++++++++++++ drivers/bus/pci/rte_bus_pci.h | 14 ++++++++++++++ drivers/bus/pci/version.map | 3 +++ drivers/net/i40e/i40e_ethdev_vf.c | 6 +++++- drivers/net/iavf/iavf_ethdev.c | 3 ++- lib/pci/rte_pci.h | 4 ++++ 6 files changed, 56 insertions(+), 2 deletions(-) -- 2.31.1