From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9FFEBA034F; Fri, 7 May 2021 10:48:21 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4C2294013F; Fri, 7 May 2021 10:48:20 +0200 (CEST) Received: from proxy.6wind.com (host.78.145.23.62.rev.coltfrance.com [62.23.145.78]) by mails.dpdk.org (Postfix) with ESMTP id 8595840040 for ; Fri, 7 May 2021 10:48:19 +0200 (CEST) Received: from localhost (unknown [10.16.0.39]) by proxy.6wind.com (Postfix) with ESMTP id 5976C974916; Fri, 7 May 2021 10:48:19 +0200 (CEST) From: Thierry Herbelot To: dev@dpdk.org Cc: Thierry Herbelot , Thomas Monjalon , =?UTF-8?q?Juraj=20Linke=C5=A1?= , Honnappa Nagarahalli , Ruifeng Wang Date: Fri, 7 May 2021 10:48:15 +0200 Message-Id: <20210507084815.25929-1-thierry.herbelot@6wind.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210506092541.19562-1-thierry.herbelot@6wind.com> References: <20210506092541.19562-1-thierry.herbelot@6wind.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH-V7] config/arm: add Qualcomm Centriq 2400 SoC config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" >From the documentation: "The SoC configuration is a combination of implementer and CPU part number configuration and SoC-specific configuration." Align Qualcomm SoC configuration with the configuration of other server SoCs (eMAG, Kunpeng 9x0): add a soc configuration to the existing implementer configuration, and a cross file. Signed-off-by: Thierry Herbelot -- V7: - use a more specific subject - add a cross file V6: - rebase after merge of "doc: fix Arm SoCs list" V5: - rebase after http://patches.dpdk.org/project/dpdk/patch/20210429070751.6065-1-david.marchand@redhat.com/ V4: - use a more specific SoC name V3: - include doc patch - remove Fixes line V2: - use the right original commit in Fixes --- config/arm/arm64_centriq2400_linux_gcc | 16 ++++++++++++++++ config/arm/meson.build | 9 +++++++++ 2 files changed, 25 insertions(+) create mode 100644 config/arm/arm64_centriq2400_linux_gcc diff --git a/config/arm/arm64_centriq2400_linux_gcc b/config/arm/arm64_centriq2400_linux_gcc new file mode 100644 index 000000000000..dfe911033196 --- /dev/null +++ b/config/arm/arm64_centriq2400_linux_gcc @@ -0,0 +1,16 @@ +[binaries] +c = 'aarch64-linux-gnu-gcc' +cpp = 'aarch64-linux-gnu-cpp' +ar = 'aarch64-linux-gnu-gcc-ar' +strip = 'aarch64-linux-gnu-strip' +pkgconfig = 'aarch64-linux-gnu-pkg-config' +pcap-config = '' + +[host_machine] +system = 'linux' +cpu_family = 'aarch64' +cpu = 'armv8-a' +endian = 'little' + +[properties] +platform = 'centriq2400' diff --git a/config/arm/meson.build b/config/arm/meson.build index 65f7ac672def..c68ea24f312f 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -223,6 +223,13 @@ soc_bluefield = { 'numa': false } +soc_centriq2400 = { + 'description': 'Qualcomm Centriq 2400', + 'implementer': '0x51', + 'part_number': '0xc00', + 'numa': false +} + soc_cn10k = { 'description' : 'Marvell OCTEON 10', 'implementer' : '0x41', @@ -326,6 +333,7 @@ Start of socs list generic: Generic un-optimized build for all aarch64 machines. armada: Marvell ARMADA bluefield: NVIDIA BlueField +centriq2400: Qualcomm Centriq 2400 cn10k: Marvell OCTEON 10 dpaa: NXP DPAA emag: Ampere eMAG @@ -346,6 +354,7 @@ socs = { 'generic': soc_generic, 'armada': soc_armada, 'bluefield': soc_bluefield, + 'centriq2400': soc_centriq2400, 'cn10k' : soc_cn10k, 'dpaa': soc_dpaa, 'emag': soc_emag, -- 2.29.2