From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8ADE6A0C41; Tue, 11 May 2021 08:47:21 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 88D1D4111A; Tue, 11 May 2021 08:46:28 +0200 (CEST) Received: from mail-lf1-f52.google.com (mail-lf1-f52.google.com [209.85.167.52]) by mails.dpdk.org (Postfix) with ESMTP id B1C7E4112D for ; Tue, 11 May 2021 08:46:23 +0200 (CEST) Received: by mail-lf1-f52.google.com with SMTP id x19so27077382lfa.2 for ; Mon, 10 May 2021 23:46:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bEUI6vV9dHgqKL+43wC567npysK8dUD1d52yCAgs70s=; b=ICPO9OWe+bmTSwTY4/C1KP9SoUSn2ZgB8ETVd7aLQikeFVYVD58fDr1fKVvcTcGqzC W2dlH8eQwW9UC19yUeHE2Mc78BAYLQ4V9UFJvoa3jImvAuxkPHbimRt3w4Ou0kntDTfv nC2MgoxeORxo+8YxUONeREv6y2DjlfWhNopH+1NT/M7MzIefqsKZcGxQVS+G+BbmgNjy J/STwfqK7yZHSE3MiTpPM72X+bHqgws/eIzls1ptVJhYRmoP3PNWKExjw2lDrWxRijQq HguD1Am+Sn96EXqPspsMW05M/D/7cKFdUdNIq6RYFDyKg+JnAXJBpFNol64XMSYIFd7f Mnuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bEUI6vV9dHgqKL+43wC567npysK8dUD1d52yCAgs70s=; b=eAuvw81cdRaS5mlbyqLWuYRWV4FWlEfQWhDc06jkSknRcSwiqwAAakggHL+o7Uizaj ZB4We7Qj9xFO3E4wL+3lwfh02NMEPGcMl1rE8QYnGjflTPVNj8uCAPFleGTtRmgMBRHW iGWsxml2X457zBuAtzucVAQX3sioVO98kptsSZy59aAADXcw/QAGI4TCUwRTvp+kg3E8 /RYa39V2IrgZ1ztyWCjG+JUOWobldkzbe0HFAcAUw87NBLn6UtGk078w78XYDunKmqSa RfFFumZ1YXAA+fSZxGxRZXoRrjT0SGR6dqkzahVFsZ1hg8pbwnzfMnPcrjFOcgG8svEJ svoA== X-Gm-Message-State: AOAM532/1MNiH0wyhb5tWwoi5VvqdnuHmhAAjLQFcfMWcs/ln49UTYLt kwavr4n3qLXKUU1J/sAEkLHDjQ== X-Google-Smtp-Source: ABdhPJxOP/PsaTd/DTP1lVxnEAQtqFsmcnpMPh9inDqNSCfX5y+eamJkHj2kko4yAMSZmwtg7P2qZw== X-Received: by 2002:a05:6512:374b:: with SMTP id a11mr19352944lfs.377.1620715583373; Mon, 10 May 2021 23:46:23 -0700 (PDT) Received: from DESKTOP-U5LNN3J.localdomain (89-79-189-199.dynamic.chello.pl. [89.79.189.199]) by smtp.gmail.com with ESMTPSA id v20sm2496776lfd.92.2021.05.10.23.46.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 May 2021 23:46:22 -0700 (PDT) From: Michal Krawczyk To: ferruh.yigit@intel.com Cc: dev@dpdk.org, ndagan@amazon.com, gtzalik@amazon.com, igorch@amazon.com, upstream@semihalf.com, Michal Krawczyk , Amit Bernstein Date: Tue, 11 May 2021 08:45:44 +0200 Message-Id: <20210511064554.10656-10-mk@semihalf.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210511064554.10656-1-mk@semihalf.com> References: <87e65a42-4ae5-1a81-8f8e-74759fc14999@intel.com> <20210511064554.10656-1-mk@semihalf.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v4 09/19] net/ena/base: use rte prefetch0 write X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" As in the v20.11 rte_prefetch0_write API was added, it should be used in the platform file for the definition of the macro prefetchw, instead of using simply prefetch0. Signed-off-by: Michal Krawczyk Reviewed-by: Igor Chauskin Reviewed-by: Amit Bernstein --- v4: * Fix commit heading style. drivers/net/ena/base/ena_plat_dpdk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ena/base/ena_plat_dpdk.h b/drivers/net/ena/base/ena_plat_dpdk.h index ddf54f0ad5..9d1426da0b 100644 --- a/drivers/net/ena/base/ena_plat_dpdk.h +++ b/drivers/net/ena/base/ena_plat_dpdk.h @@ -291,7 +291,7 @@ extern rte_atomic32_t ena_alloc_cnt; #define might_sleep() #define prefetch(x) rte_prefetch0(x) -#define prefetchw(x) prefetch(x) +#define prefetchw(x) rte_prefetch0_write(x) #define lower_32_bits(x) ((uint32_t)(x)) #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16)) -- 2.25.1