From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 55C57A0A0E; Tue, 11 May 2021 15:14:48 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 272B041104; Tue, 11 May 2021 15:14:44 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id 8AEF3406A3; Tue, 11 May 2021 15:14:42 +0200 (CEST) IronPort-SDR: UISltvMCdpbNvkpVigGs8gP8ciUg6VEkxfk7MYv3EbK4a3m4GHyS6mJxZwTocpW3pFwc8vUVM4 K/NtvzJre+YQ== X-IronPort-AV: E=McAfee;i="6200,9189,9980"; a="284928119" X-IronPort-AV: E=Sophos;i="5.82,290,1613462400"; d="scan'208";a="284928119" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2021 06:14:42 -0700 IronPort-SDR: KvIrDEFZNTt15AvJWRk1vzbduWV2Vo5WFPzwM9B0nrxg9JvKQor8fjr47rs5BToOnybMjS3Zby XoebFnSqqMuQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,290,1613462400"; d="scan'208";a="537021104" Received: from silpixa00399752.ir.intel.com (HELO silpixa00399752.ger.corp.intel.com) ([10.237.222.27]) by fmsmga001.fm.intel.com with ESMTP; 11 May 2021 06:14:40 -0700 From: Ferruh Yigit To: Rasesh Mody , Shahed Shaikh Cc: Ferruh Yigit , dev@dpdk.org, stable@dpdk.org, Kevin Traynor , Ajit Khaparde Date: Tue, 11 May 2021 14:14:33 +0100 Message-Id: <20210511131435.1226820-2-ferruh.yigit@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210511131435.1226820-1-ferruh.yigit@intel.com> References: <20210510150319.1496105-1-ferruh.yigit@intel.com> <20210511131435.1226820-1-ferruh.yigit@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v3 2/4] net/bnx2x: fix build with gcc11 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Reproduced with '--buildtype=debugoptimized' config, compiler version: gcc (GCC) 12.0.0 20210509 (experimental) Build error: In file included from ../drivers/net/bnx2x/bnx2x.c:16: ../drivers/net/bnx2x/bnx2x.c: In function ‘bnx2x_hc_ack_sb’: ../drivers/net/bnx2x/bnx2x.h:1528:35: warning: ‘igu_ack’ is used uninitialized [-Wuninitialized] #define REG_WR32(sc, offset, val) bnx2x_reg_write32(sc, (offset), val) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../drivers/net/bnx2x/bnx2x.h:1531:33: note: in expansion of macro ‘REG_WR32’ 1531 | #define REG_WR(sc, offset, val) REG_WR32(sc, offset, val) | ^~~~~~~~ ../drivers/net/bnx2x/bnx2x.h:1916:9: note: in expansion of macro ‘REG_WR’ 1916 | REG_WR(sc, hc_addr, *val); | ^~~~~~ ../drivers/net/bnx2x/bnx2x.h:1905:33: note: ‘igu_ack’ declared here 1905 | struct igu_ack_register igu_ack; | ^~~~~~~ REG_WR32 requires 'uint32_t', use union instead of cast to 'uint32_t'. Bugzilla ID: 692 Fixes: 38dff79ba736 ("net/bnx2x: update HSI") Cc: stable@dpdk.org Signed-off-by: Ferruh Yigit Acked-by: Kevin Traynor --- Cc: rmody@marvell.com Cc: Kevin Traynor Cc: Ajit Khaparde v3: * Add missing Bugzilla tag --- drivers/net/bnx2x/bnx2x.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index e13ab1557418..80d19cbfd665 100644 --- a/drivers/net/bnx2x/bnx2x.h +++ b/drivers/net/bnx2x/bnx2x.h @@ -1902,18 +1902,19 @@ bnx2x_hc_ack_sb(struct bnx2x_softc *sc, uint8_t sb_id, uint8_t storm, { uint32_t hc_addr = (HC_REG_COMMAND_REG + SC_PORT(sc) * 32 + COMMAND_REG_INT_ACK); - struct igu_ack_register igu_ack; - uint32_t *val = NULL; + union { + struct igu_ack_register igu_ack; + uint32_t val; + } val; - igu_ack.status_block_index = index; - igu_ack.sb_id_and_flags = + val.igu_ack.status_block_index = index; + val.igu_ack.sb_id_and_flags = ((sb_id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) | (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) | (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) | (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT)); - val = (uint32_t *)&igu_ack; - REG_WR(sc, hc_addr, *val); + REG_WR(sc, hc_addr, val.val); /* Make sure that ACK is written */ mb(); -- 2.31.1