From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A7F51A0547; Mon, 24 May 2021 03:44:38 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 18F2B4003E; Mon, 24 May 2021 03:44:38 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id E69CF4003C for ; Mon, 24 May 2021 03:44:35 +0200 (CEST) IronPort-SDR: uJWn025n4/1RmQSAlcC9R6eNXtOVf628F2PryEC+DCB79A441UsQZhRTxDN860EN3nx2nHlM0h DvbdLF85msaA== X-IronPort-AV: E=McAfee;i="6200,9189,9993"; a="201573596" X-IronPort-AV: E=Sophos;i="5.82,319,1613462400"; d="scan'208";a="201573596" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2021 18:44:33 -0700 IronPort-SDR: 9a71V3rZ4V9FqLA0bvV37v9/kmHujFhp4BMQVj3V+/IlPbooMPFctvNXoiZGuLchpDTfCjB+A8 E69zTloxNlVQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,319,1613462400"; d="scan'208";a="441824212" Received: from npg-dpdk-haiyue-1.sh.intel.com ([10.67.118.220]) by orsmga008.jf.intel.com with ESMTP; 23 May 2021 18:44:32 -0700 From: Haiyue Wang To: dev@dpdk.org Cc: qi.z.zhang@intel.com, liang-min.wang@intel.com, david.marchand@redhat.com, Haiyue Wang Date: Mon, 24 May 2021 09:23:42 +0800 Message-Id: <20210524012346.496560-1-haiyue.wang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210421050243.130585-1-haiyue.wang@intel.com> References: <20210421050243.130585-1-haiyue.wang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v7 0/3] fix PF reset causes VF memory request failure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Trigger the VF reset from PF reset, echo 1 > /sys/bus/pci/devices/PF-BDF/reset the PCI bus master bit will cleared on VF, so the VF needs to enable this bit before restart. This patch set adds the API to enable PCI bus master. v7: fix the commit message typo, and update some description. v6: update the annotate symbol version, and add some comments in source code v5: error handling if bus master enable failed v4: change the API to set type, so can enable or disable v3: added the missed annotate symbol add time v2: rebase to new librte directory path Haiyue Wang (3): bus/pci: set PCI master in command register net/iavf: enable PCI bus master after reset net/i40e: enable PCI bus master after reset drivers/bus/pci/pci_common.c | 28 ++++++++++++++++++++++++++++ drivers/bus/pci/rte_bus_pci.h | 14 ++++++++++++++ drivers/bus/pci/version.map | 3 +++ drivers/net/i40e/i40e_ethdev_vf.c | 13 ++++++++++++- drivers/net/iavf/iavf_ethdev.c | 10 +++++++++- lib/pci/rte_pci.h | 4 ++++ 6 files changed, 70 insertions(+), 2 deletions(-) -- 2.31.1