From: Arek Kusztal <arkadiuszx.kusztal@intel.com>
To: dev@dpdk.org
Cc: gakhil@marvell.com, fiona.trahe@intel.com,
roy.fan.zhang@intel.com,
Arek Kusztal <arkadiuszx.kusztal@intel.com>
Subject: [dpdk-dev] [PATCH 09/15] crypto/qat: add chacha-poly in ucs spc mode
Date: Mon, 31 May 2021 15:10:21 +0100 [thread overview]
Message-ID: <20210531141027.13289-10-arkadiuszx.kusztal@intel.com> (raw)
In-Reply-To: <20210531141027.13289-1-arkadiuszx.kusztal@intel.com>
This commit adds Chacha20-Poly1305 aglorithm that works
in UCS (Unified crypto slice) SPC(Single-Pass) mode.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
drivers/crypto/qat/qat_sym_capabilities.h | 32 ++++++++++++++++++++++-
drivers/crypto/qat/qat_sym_session.c | 2 ++
2 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/qat/qat_sym_capabilities.h b/drivers/crypto/qat/qat_sym_capabilities.h
index fc8e667687..5c6e723466 100644
--- a/drivers/crypto/qat/qat_sym_capabilities.h
+++ b/drivers/crypto/qat/qat_sym_capabilities.h
@@ -1144,7 +1144,37 @@
}, \
}, } \
}, } \
- } \
+ }, \
+ { /* Chacha20-Poly1305 */ \
+ .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, \
+ {.sym = { \
+ .xform_type = RTE_CRYPTO_SYM_XFORM_AEAD, \
+ {.aead = { \
+ .algo = RTE_CRYPTO_AEAD_CHACHA20_POLY1305, \
+ .block_size = 64, \
+ .key_size = { \
+ .min = 32, \
+ .max = 32, \
+ .increment = 0 \
+ }, \
+ .digest_size = { \
+ .min = 16, \
+ .max = 16, \
+ .increment = 0 \
+ }, \
+ .aad_size = { \
+ .min = 0, \
+ .max = 240, \
+ .increment = 1 \
+ }, \
+ .iv_size = { \
+ .min = 12, \
+ .max = 12, \
+ .increment = 0 \
+ }, \
+ }, } \
+ }, } \
+ }
diff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c
index 7d66ca5172..221b950aeb 100644
--- a/drivers/crypto/qat/qat_sym_session.c
+++ b/drivers/crypto/qat/qat_sym_session.c
@@ -921,6 +921,8 @@ qat_sym_session_configure_aead(struct rte_cryptodev *dev,
case RTE_CRYPTO_AEAD_CHACHA20_POLY1305:
if (aead_xform->key.length != ICP_QAT_HW_CHACHAPOLY_KEY_SZ)
return -EINVAL;
+ if (qat_dev_gen == QAT_GEN4)
+ session->is_ucs = 1;
session->qat_cipher_alg =
ICP_QAT_HW_CIPHER_ALGO_CHACHA20_POLY1305;
qat_sym_session_handle_single_pass(session,
--
2.25.1
next prev parent reply other threads:[~2021-05-31 14:12 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-31 14:10 [dpdk-dev] [PATCH 00/15] Add support for fourth generation of Intel QuickAssist Technology devices Arek Kusztal
2021-05-31 14:10 ` [dpdk-dev] [PATCH 01/15] common/qat: rework qp per service function Arek Kusztal
2021-05-31 14:10 ` [dpdk-dev] [PATCH 02/15] crypto/qat: add fourth generation qat devices support Arek Kusztal
2021-05-31 14:10 ` [dpdk-dev] [PATCH 03/15] crypto/qat: enable gen4 legacy algorithms Arek Kusztal
2021-05-31 14:10 ` [dpdk-dev] [PATCH 04/15] crypto/qat: add fourth generation ucs slice type, add ctr mode Arek Kusztal
2021-05-31 14:10 ` [dpdk-dev] [PATCH 05/15] crypto/qat: rename content descriptor functions Arek Kusztal
2021-05-31 14:10 ` [dpdk-dev] [PATCH 06/15] crypto/qat: add legacy gcm and ccm Arek Kusztal
2021-05-31 14:10 ` [dpdk-dev] [PATCH 07/15] crypto/qat: rework init common header function Arek Kusztal
2021-05-31 14:10 ` [dpdk-dev] [PATCH 08/15] crypto/qat: add aes gcm in ucs spc mode Arek Kusztal
2021-05-31 14:10 ` Arek Kusztal [this message]
2021-05-31 14:10 ` [dpdk-dev] [PATCH 10/15] crypto/qat: add gmac in legacy mode on fourth generation Arek Kusztal
2021-05-31 14:10 ` [dpdk-dev] [PATCH 11/15] common/qat: add pf2vf communication in qat Arek Kusztal
2021-05-31 14:10 ` [dpdk-dev] [PATCH 12/15] common/qat: reset ring pairs before setting pmd Arek Kusztal
2021-05-31 14:10 ` [dpdk-dev] [PATCH 13/15] crypto/qat: update raw dp api Arek Kusztal
2021-05-31 14:10 ` [dpdk-dev] [PATCH 14/15] crypto/qat: enable RAW API on QAT GEN1-3 only Arek Kusztal
2021-05-31 14:10 ` [dpdk-dev] [PATCH 15/15] test/crypto: check if RAW API is supported Arek Kusztal
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