From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5E8C4A0524; Mon, 31 May 2021 23:44:18 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E08F440E46; Mon, 31 May 2021 23:42:54 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 2CF1240DFF for ; Mon, 31 May 2021 23:42:53 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 14VLdks6025644; Mon, 31 May 2021 14:42:50 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=15ZfkhCfRM1TZBo+/8QAxdbpUKhhxQbT1WF6de/DJTk=; b=WxlCkzW8IQWBXK3VmB35ebLoVGJZiRwuWTvGwGySxN3XkVdMP3gwsOgfplVoxra7MzyE xBg9oiAER3+iTDNb+QCPIzrd6V6LWxFYkhZjMyihE1NFmxqePNTh10px/G7lm6QjL8Kd gPspAgyPU7NvHOJunleVauoC7xvpStd686P7qsrxthBJ6ARH9TD1KbWq9HkJnsIg4vz1 EbX1Lsy0+lZWtaPZdAZlfdGESwrOeZmUfYrZqfF98AQlWs8KJ9Xvw0IB2TKsyNU4hLpJ oGeFfozOAuyYgnzZksLK7LdK4GAkdn5994bdM2+fsCmV7uFmnm4ZUCNwjv5TBnyQQq6d hw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 38vjqj33a7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 31 May 2021 14:42:50 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 31 May 2021 14:42:49 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 31 May 2021 14:42:49 -0700 Received: from EH-LT0048.marvell.com (unknown [10.193.32.52]) by maili.marvell.com (Postfix) with ESMTP id 814EB3F703F; Mon, 31 May 2021 14:42:47 -0700 (PDT) From: Tomasz Duszynski To: CC: , , Tomasz Duszynski , Ray Kinsella , Neil Horman Date: Mon, 31 May 2021 23:41:38 +0200 Message-ID: <20210531214142.30167-25-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210531214142.30167-1-tduszynski@marvell.com> References: <20210531214142.30167-1-tduszynski@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: cxy5Fy0N30NeF30MjC13xg02u3pmxV_I X-Proofpoint-ORIG-GUID: cxy5Fy0N30NeF30MjC13xg02u3pmxV_I X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-31_15:2021-05-31, 2021-05-31 signatures=0 Subject: [dpdk-dev] [PATCH 24/28] raw/cnxk_bphy: add support for interrupt init and cleanup X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for interrupt initialization and cleanup. Internally interrupt initialization performs low level setup that allows custom interrupt handler registration later on. Interrupt initialization and cleanup are related hence they are in the same patch. Signed-off-by: Jakub Palider Signed-off-by: Tomasz Duszynski --- drivers/raw/cnxk_bphy/cnxk_bphy.c | 13 ++++++++ drivers/raw/cnxk_bphy/cnxk_bphy_irq.c | 47 +++++++++++++++++++++++++++ drivers/raw/cnxk_bphy/cnxk_bphy_irq.h | 5 +++ drivers/raw/cnxk_bphy/meson.build | 1 + drivers/raw/cnxk_bphy/rte_pmd_bphy.h | 7 ++++ drivers/raw/cnxk_bphy/version.map | 12 +++++++ 6 files changed, 85 insertions(+) create mode 100644 drivers/raw/cnxk_bphy/cnxk_bphy_irq.c diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy.c b/drivers/raw/cnxk_bphy/cnxk_bphy.c index 51affed78..e3a065b30 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy.c +++ b/drivers/raw/cnxk_bphy/cnxk_bphy.c @@ -13,6 +13,7 @@ #include #include "cnxk_bphy_irq.h" +#include "rte_pmd_bphy.h" static const struct rte_pci_id pci_bphy_map[] = { {RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CNXK_BPHY)}, @@ -21,6 +22,18 @@ static const struct rte_pci_id pci_bphy_map[] = { }, }; +int +rte_pmd_bphy_intr_init(uint16_t dev_id) +{ + return cnxk_bphy_intr_init(dev_id); +} + +void +rte_pmd_bphy_intr_fini(uint16_t dev_id) +{ + return cnxk_bphy_intr_fini(dev_id); +} + static const struct rte_rawdev_ops bphy_rawdev_ops = { }; diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_irq.c b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.c new file mode 100644 index 000000000..5d47840d6 --- /dev/null +++ b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.c @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell International Ltd. + */ +#include +#include +#include +#include + +#include +#include + +#include "cnxk_bphy_irq.h" + +static struct bphy_device * +cnxk_bphy_get_bphy_dev_by_dev_id(uint16_t dev_id) +{ + struct rte_rawdev *rawdev; + + if (!rte_rawdev_pmd_is_valid_dev(dev_id)) + return NULL; + + rawdev = &rte_rawdevs[dev_id]; + + return (struct bphy_device *)rawdev->dev_private; +} + +int +cnxk_bphy_intr_init(uint16_t dev_id) +{ + struct bphy_device *bphy_dev = cnxk_bphy_get_bphy_dev_by_dev_id(dev_id); + + bphy_dev->irq_chip = roc_bphy_intr_init(); + if (bphy_dev->irq_chip == NULL) + return -ENOMEM; + + return 0; +} + +void +cnxk_bphy_intr_fini(uint16_t dev_id) +{ + struct bphy_device *bphy_dev = cnxk_bphy_get_bphy_dev_by_dev_id(dev_id); + struct roc_bphy_irq_chip *irq_chip = bphy_dev->irq_chip; + + roc_bphy_intr_fini(irq_chip); + bphy_dev->irq_chip = NULL; +} diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h index 77169b1b7..6e3d77768 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h +++ b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h @@ -20,4 +20,9 @@ struct bphy_device { struct bphy_mem mem; }; +__rte_internal +int cnxk_bphy_intr_init(uint16_t dev_id); +__rte_internal +void cnxk_bphy_intr_fini(uint16_t dev_id); + #endif /* _CNXK_BPHY_IRQ_ */ diff --git a/drivers/raw/cnxk_bphy/meson.build b/drivers/raw/cnxk_bphy/meson.build index 23d46f11d..1c3e6c1b7 100644 --- a/drivers/raw/cnxk_bphy/meson.build +++ b/drivers/raw/cnxk_bphy/meson.build @@ -6,6 +6,7 @@ deps += ['bus_pci', 'common_cnxk', 'rawdev'] sources = files( 'cnxk_bphy.c', 'cnxk_bphy_cgx.c', + 'cnxk_bphy_irq.c', 'cnxk_bphy_cgx_test.c' ) headers = files('rte_pmd_bphy.h') diff --git a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h index 84176ff22..edc146685 100644 --- a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h +++ b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h @@ -5,6 +5,8 @@ #ifndef _CNXK_BPHY_H_ #define _CNXK_BPHY_H_ +#include "cnxk_bphy_irq.h" + enum cnxk_bphy_cgx_msg_type { CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO, CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE, @@ -101,4 +103,9 @@ struct cnxk_bphy_cgx_msg { void *data; }; +__rte_experimental +int rte_pmd_bphy_intr_init(uint16_t dev_id); +__rte_experimental +void rte_pmd_bphy_intr_fini(uint16_t dev_id); + #endif /* _CNXK_BPHY_H_ */ diff --git a/drivers/raw/cnxk_bphy/version.map b/drivers/raw/cnxk_bphy/version.map index 4a76d1d52..e087cd39b 100644 --- a/drivers/raw/cnxk_bphy/version.map +++ b/drivers/raw/cnxk_bphy/version.map @@ -1,3 +1,15 @@ DPDK_21 { local: *; }; +INTERNAL { + global: + + cnxk_bphy_intr_init; + cnxk_bphy_intr_fini; +}; +EXPERIMENTAL { + global: + + rte_pmd_bphy_intr_fini; + rte_pmd_bphy_intr_init; +}; -- 2.25.1