From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 269B1A0524; Mon, 31 May 2021 23:44:35 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 84F0341103; Mon, 31 May 2021 23:43:00 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id DF48941103 for ; Mon, 31 May 2021 23:42:58 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 14VLeT3d002864 for ; Mon, 31 May 2021 14:42:58 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=3Bk5A2NuCglqZEoSqWYN7upLaeb1rxanG8zMphyLR9k=; b=Q/acMSx1sYprnjUMuvuNr4LEpxT7avSbVfIaE1bQSa4KLhFUe0Her8JrwrxjaeUYquqZ ex3qhg70+cYdvzQnw3CoXymTTrPAAmYY7DG8FjKT2CLe3n4Hjyy1fMYngBKygl8adedn 9YhOZ9Kthc+AFUL+UWrzAyZydltAWknrJ1PVcU6YcXKs92RKvTCPy25UAbWKUNdPjtMy o+jlD4wUy6QtyYy4bd1Ggx+ztsfZE9JrI825jMwZo61+fuumdTanktz1WUQJ4XbcAY5Y 5+MpJaxbKWpao6J4x6KLn2urtcGOE/IzKB1WO/M9V5MezkaRBbk785YO2JzmTW2L1egV 2w== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 38vtnja14n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 31 May 2021 14:42:58 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 31 May 2021 14:42:56 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 31 May 2021 14:42:56 -0700 Received: from EH-LT0048.marvell.com (unknown [10.193.32.52]) by maili.marvell.com (Postfix) with ESMTP id 4A2353F703F; Mon, 31 May 2021 14:42:55 -0700 (PDT) From: Tomasz Duszynski To: CC: , , Tomasz Duszynski Date: Mon, 31 May 2021 23:41:42 +0200 Message-ID: <20210531214142.30167-29-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210531214142.30167-1-tduszynski@marvell.com> References: <20210531214142.30167-1-tduszynski@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: 09aqPZ6kJcR9D4mKM6-NWi-_JMUkFOPB X-Proofpoint-ORIG-GUID: 09aqPZ6kJcR9D4mKM6-NWi-_JMUkFOPB X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-31_15:2021-05-31, 2021-05-31 signatures=0 Subject: [dpdk-dev] [PATCH 28/28] raw/cnxk_bphy: add support for selftest X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for performing selftest. Signed-off-by: Jakub Palider Signed-off-by: Tomasz Duszynski --- drivers/raw/cnxk_bphy/cnxk_bphy.c | 104 ++++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy.c b/drivers/raw/cnxk_bphy/cnxk_bphy.c index a6bbdd986..640405242 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy.c +++ b/drivers/raw/cnxk_bphy/cnxk_bphy.c @@ -11,6 +11,7 @@ #include #include +#include #include "cnxk_bphy_irq.h" #include "rte_pmd_bphy.h" @@ -22,6 +23,25 @@ static const struct rte_pci_id pci_bphy_map[] = { }, }; +struct bphy_test { + int irq_num; + cnxk_bphy_intr_handler_t handler; + void *data; + int cpu; + bool handled_intr; + int handled_data; + int test_data; +}; + +static struct bphy_test *test; + +static void +bphy_test_handler_fn(int irq_num, void *isr_data) +{ + test[irq_num].handled_intr = true; + test[irq_num].handled_data = *((int *)isr_data); +} + int rte_pmd_bphy_intr_init(uint16_t dev_id) { @@ -54,7 +74,91 @@ rte_pmd_bphy_intr_unregister(uint16_t dev_id, int irq_num) cnxk_bphy_intr_unregister(dev_id, irq_num); } +static int +bphy_rawdev_selftest(uint16_t dev_id) +{ + unsigned int i; + uint64_t max_irq; + int ret = 0; + + ret = rte_pmd_bphy_intr_init(dev_id); + if (ret) { + plt_err("intr init failed"); + return ret; + } + + max_irq = cnxk_bphy_irq_max_get(dev_id); + + test = rte_zmalloc("BPHY", max_irq * sizeof(*test), 0); + if (test == NULL) { + plt_err("intr alloc failed"); + goto err_alloc; + } + + for (i = 0; i < max_irq; i++) { + test[i].test_data = i; + test[i].irq_num = i; + test[i].handler = bphy_test_handler_fn; + test[i].data = &test[i].test_data; + } + + for (i = 0; i < max_irq; i++) { + ret = rte_pmd_bphy_intr_register(dev_id, test[i].irq_num, + test[i].handler, test[i].data, + 0); + if (ret == -ENOTSUP) { + /* In the test we iterate over all irq numbers + * so if some of them are not supported by given + * platform we treat respective results as valid + * ones. This way they have no impact on overall + * test results. + */ + test[i].handled_intr = true; + test[i].handled_data = test[i].test_data; + ret = 0; + continue; + } + + if (ret) { + plt_err("intr register failed at irq %d", i); + goto err_register; + } + } + + for (i = 0; i < max_irq; i++) + roc_bphy_intr_handler(i); + + for (i = 0; i < max_irq; i++) { + if (!test[i].handled_intr) { + plt_err("intr %u not handled", i); + ret = -1; + break; + } + if (test[i].handled_data != test[i].test_data) { + plt_err("intr %u has wrong handler", i); + ret = -1; + break; + } + } + +err_register: + /* + * In case of registration failure the loop goes over all + * interrupts which is safe due to internal guards in + * rte_pmd_bphy_intr_unregister(). + */ + for (i = 0; i < max_irq; i++) + rte_pmd_bphy_intr_unregister(dev_id, i); + + rte_free(test); +err_alloc: + rte_pmd_bphy_intr_fini(dev_id); + + return ret; +} + static const struct rte_rawdev_ops bphy_rawdev_ops = { + .dev_selftest = bphy_rawdev_selftest, }; static void -- 2.25.1