DPDK patches and discussions
 help / color / mirror / Atom feed
From: Tomasz Duszynski <tduszynski@marvell.com>
To: <dev@dpdk.org>
Cc: <jpalider@marvell.com>, <jerinj@marvell.com>,
	Tomasz Duszynski <tduszynski@marvell.com>,
	Nithin Dabilpuram <ndabilpuram@marvell.com>,
	"Kiran Kumar K" <kirankumark@marvell.com>,
	Sunil Kumar Kori <skori@marvell.com>,
	Satha Rao <skoteshwar@marvell.com>
Subject: [dpdk-dev] [PATCH 02/28] common/cnxk: add support for communication with atf
Date: Mon, 31 May 2021 23:41:16 +0200	[thread overview]
Message-ID: <20210531214142.30167-3-tduszynski@marvell.com> (raw)
In-Reply-To: <20210531214142.30167-1-tduszynski@marvell.com>

Messages can be exchanged between userspace software and firmware
via set of two dedicated registers, namely scratch1 and scratch0.

scratch1 acts as a command register i.e message is sent to firmware,
while scratch0 holds response to previously sent message.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
---
 drivers/common/cnxk/roc_bphy_cgx.c      | 145 ++++++++++++++++++++++++
 drivers/common/cnxk/roc_bphy_cgx.h      |   4 +
 drivers/common/cnxk/roc_bphy_cgx_priv.h |  54 +++++++++
 drivers/common/cnxk/roc_priv.h          |   3 +
 4 files changed, 206 insertions(+)
 create mode 100644 drivers/common/cnxk/roc_bphy_cgx_priv.h

diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c
index 029d4102e..5048a90de 100644
--- a/drivers/common/cnxk/roc_bphy_cgx.c
+++ b/drivers/common/cnxk/roc_bphy_cgx.c
@@ -2,8 +2,13 @@
  * Copyright(C) 2021 Marvell.
  */
 
+#include <pthread.h>
+
 #include "roc_api.h"
+#include "roc_priv.h"
 
+#define CGX_CMRX_INT		       0x40
+#define CGX_CMRX_INT_OVERFLW	       BIT_ULL(1)
 /*
  * CN10K stores number of lmacs in 4 bit filed
  * in contraty to CN9K which uses only 3 bits.
@@ -15,6 +20,8 @@
  */
 #define CGX_CMRX_RX_LMACS	0x128
 #define CGX_CMRX_RX_LMACS_LMACS GENMASK_ULL(3, 0)
+#define CGX_CMRX_SCRATCH0	0x1050
+#define CGX_CMRX_SCRATCH1	0x1058
 
 static uint64_t
 roc_bphy_cgx_read(struct roc_bphy_cgx *roc_cgx, uint64_t lmac, uint64_t offset)
@@ -25,6 +32,137 @@ roc_bphy_cgx_read(struct roc_bphy_cgx *roc_cgx, uint64_t lmac, uint64_t offset)
 	return plt_read64(base + (lmac << shift) + offset);
 }
 
+static void
+roc_bphy_cgx_write(struct roc_bphy_cgx *roc_cgx, uint64_t lmac, uint64_t offset,
+		   uint64_t value)
+{
+	int shift = roc_model_is_cn10k() ? 20 : 18;
+	uint64_t base = (uint64_t)roc_cgx->bar0_va;
+
+	plt_write64(value, base + (lmac << shift) + offset);
+}
+
+static void
+roc_bphy_cgx_ack(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+		 uint64_t *scr0)
+{
+	uint64_t val;
+
+	/* clear interrupt */
+	val = roc_bphy_cgx_read(roc_cgx, lmac, CGX_CMRX_INT);
+	val |= FIELD_PREP(CGX_CMRX_INT_OVERFLW, 1);
+	roc_bphy_cgx_write(roc_cgx, lmac, CGX_CMRX_INT, val);
+
+	/* ack fw response */
+	*scr0 &= ~SCR0_ETH_EVT_STS_S_ACK;
+	roc_bphy_cgx_write(roc_cgx, lmac, CGX_CMRX_SCRATCH0, *scr0);
+}
+
+static int
+roc_bphy_cgx_wait_for_ownership(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
+{
+	uint64_t scr0, scr1;
+	int tries = 5000;
+
+	do {
+		scr0 = roc_bphy_cgx_read(roc_cgx, lmac, CGX_CMRX_SCRATCH0);
+		scr1 = roc_bphy_cgx_read(roc_cgx, lmac, CGX_CMRX_SCRATCH1);
+
+		if (FIELD_GET(SCR1_OWN_STATUS, scr1) == ETH_OWN_NON_SECURE_SW &&
+		    FIELD_GET(SCR0_ETH_EVT_STS_S_ACK, scr0) == 0)
+			break;
+
+		/* clear async events if any */
+		if (FIELD_GET(SCR0_ETH_EVT_STS_S_EVT_TYPE, scr0) == ETH_EVT_ASYNC &&
+		    FIELD_GET(SCR0_ETH_EVT_STS_S_ACK, scr0))
+			roc_bphy_cgx_ack(roc_cgx, lmac, &scr0);
+
+		plt_delay_ms(1);
+	} while (--tries);
+
+	return tries ? 0 : -ETIMEDOUT;
+}
+
+static int
+roc_bphy_cgx_wait_for_ack(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
+{
+	uint64_t scr0, scr1;
+	int tries = 5000;
+
+	do {
+		scr0 = roc_bphy_cgx_read(roc_cgx, lmac, CGX_CMRX_SCRATCH0);
+		scr1 = roc_bphy_cgx_read(roc_cgx, lmac, CGX_CMRX_SCRATCH1);
+
+		if (FIELD_GET(SCR1_OWN_STATUS, scr1) == ETH_OWN_NON_SECURE_SW &&
+		    FIELD_GET(SCR0_ETH_EVT_STS_S_ACK, scr0))
+			break;
+
+		plt_delay_ms(1);
+	} while (--tries);
+
+	return tries ? 0 : -ETIMEDOUT;
+}
+
+static int
+roc_bphy_cgx_intf_req(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+		      uint64_t scr1, uint64_t *scr0)
+{
+	uint8_t cmd_id = FIELD_GET(SCR1_ETH_CMD_ID, scr1);
+	int ret;
+
+	pthread_mutex_lock(&roc_cgx->lock);
+
+	/* wait for ownership */
+	ret = roc_bphy_cgx_wait_for_ownership(roc_cgx, lmac);
+	if (ret) {
+		plt_err("timed out waiting for ownership");
+		goto out;
+	}
+
+	/* write command */
+	scr1 |= FIELD_PREP(SCR1_OWN_STATUS, ETH_OWN_FIRMWARE);
+	roc_bphy_cgx_write(roc_cgx, lmac, CGX_CMRX_SCRATCH1, scr1);
+
+	/* wait for command ack */
+	ret = roc_bphy_cgx_wait_for_ack(roc_cgx, lmac);
+	if (ret) {
+		plt_err("timed out waiting for response");
+		goto out;
+	}
+
+	if (cmd_id == ETH_CMD_INTF_SHUTDOWN)
+		goto out;
+
+	*scr0 = roc_bphy_cgx_read(roc_cgx, lmac, CGX_CMRX_SCRATCH0);
+
+	if (FIELD_GET(SCR0_ETH_EVT_STS_S_EVT_TYPE, *scr0) != ETH_EVT_CMD_RESP) {
+		plt_err("received async event instead of cmd resp event");
+		ret = -EIO;
+		goto out;
+	}
+
+	if (FIELD_GET(SCR0_ETH_EVT_STS_S_ID, *scr0) != cmd_id) {
+		plt_err("received resp for cmd %d expected for cmd %d",
+			(int)FIELD_GET(SCR0_ETH_EVT_STS_S_ID, *scr0), cmd_id);
+		ret = -EIO;
+		goto out;
+	}
+
+	if (FIELD_GET(SCR0_ETH_EVT_STS_S_STAT, *scr0) != ETH_STAT_SUCCESS) {
+		plt_err("cmd %d failed on cgx%u lmac%u with errcode %d", cmd_id,
+			roc_cgx->id, lmac,
+			(int)FIELD_GET(SCR0_ETH_LNK_STS_S_ERR_TYPE, *scr0));
+		ret = -EIO;
+	}
+
+out:
+	roc_bphy_cgx_ack(roc_cgx, lmac, scr0);
+
+	pthread_mutex_unlock(&roc_cgx->lock);
+
+	return ret;
+}
+
 static unsigned int
 roc_bphy_cgx_dev_id(struct roc_bphy_cgx *roc_cgx)
 {
@@ -38,10 +176,15 @@ int
 roc_bphy_cgx_dev_init(struct roc_bphy_cgx *roc_cgx)
 {
 	uint64_t val;
+	int ret;
 
 	if (!roc_cgx || !roc_cgx->bar0_va || !roc_cgx->bar0_pa)
 		return -EINVAL;
 
+	ret = pthread_mutex_init(&roc_cgx->lock, NULL);
+	if (ret)
+		return ret;
+
 	val = roc_bphy_cgx_read(roc_cgx, 0, CGX_CMRX_RX_LMACS);
 	val = FIELD_GET(CGX_CMRX_RX_LMACS_LMACS, val);
 	if (roc_model_is_cn9k())
@@ -58,5 +201,7 @@ roc_bphy_cgx_dev_fini(struct roc_bphy_cgx *roc_cgx)
 	if (!roc_cgx)
 		return -EINVAL;
 
+	pthread_mutex_destroy(&roc_cgx->lock);
+
 	return 0;
 }
diff --git a/drivers/common/cnxk/roc_bphy_cgx.h b/drivers/common/cnxk/roc_bphy_cgx.h
index aac2c262c..37b5c2742 100644
--- a/drivers/common/cnxk/roc_bphy_cgx.h
+++ b/drivers/common/cnxk/roc_bphy_cgx.h
@@ -5,6 +5,8 @@
 #ifndef _ROC_BPHY_CGX_H_
 #define _ROC_BPHY_CGX_H_
 
+#include <pthread.h>
+
 #include "roc_api.h"
 
 struct roc_bphy_cgx {
@@ -12,6 +14,8 @@ struct roc_bphy_cgx {
 	void *bar0_va;
 	uint64_t lmac_bmap;
 	unsigned int id;
+	/* serialize access to the whole structure */
+	pthread_mutex_t lock;
 } __plt_cache_aligned;
 
 __roc_api int roc_bphy_cgx_dev_init(struct roc_bphy_cgx *roc_cgx);
diff --git a/drivers/common/cnxk/roc_bphy_cgx_priv.h b/drivers/common/cnxk/roc_bphy_cgx_priv.h
new file mode 100644
index 000000000..42d0bce7a
--- /dev/null
+++ b/drivers/common/cnxk/roc_bphy_cgx_priv.h
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef _ROC_BPHY_CGX_PRIV_H_
+#define _ROC_BPHY_CGX_PRIV_H_
+
+/* REQUEST ID types. Input to firmware */
+enum eth_cmd_id {
+	ETH_CMD_INTF_SHUTDOWN = 12,
+};
+
+/* event types - cause of interrupt */
+enum eth_evt_type {
+	ETH_EVT_ASYNC,
+	ETH_EVT_CMD_RESP,
+};
+
+enum eth_stat {
+	ETH_STAT_SUCCESS,
+	ETH_STAT_FAIL,
+};
+
+enum eth_cmd_own {
+	/* default ownership with kernel/uefi/u-boot */
+	ETH_OWN_NON_SECURE_SW,
+	/* set by kernel/uefi/u-boot after posting a new request to ATF */
+	ETH_OWN_FIRMWARE,
+};
+
+/* scratchx(0) CSR used for ATF->non-secure SW communication.
+ * This acts as the status register
+ * Provides details on command ack/status, link status, error details
+ */
+
+/* struct eth_evt_sts_s */
+#define SCR0_ETH_EVT_STS_S_ACK	    BIT_ULL(0)
+#define SCR0_ETH_EVT_STS_S_EVT_TYPE BIT_ULL(1)
+#define SCR0_ETH_EVT_STS_S_STAT	    BIT_ULL(2)
+#define SCR0_ETH_EVT_STS_S_ID	    GENMASK_ULL(8, 3)
+
+/* struct eth_lnk_sts_s */
+#define SCR0_ETH_LNK_STS_S_ERR_TYPE    GENMASK_ULL(24, 15)
+
+/* scratchx(1) CSR used for non-secure SW->ATF communication
+ * This CSR acts as a command register
+ */
+
+/* struct eth_cmd */
+#define SCR1_ETH_CMD_ID GENMASK_ULL(7, 2)
+
+#define SCR1_OWN_STATUS GENMASK_ULL(1, 0)
+
+#endif /* _ROC_BPHY_CGX_PRIV_H_ */
diff --git a/drivers/common/cnxk/roc_priv.h b/drivers/common/cnxk/roc_priv.h
index 5e7564ce5..feca732a9 100644
--- a/drivers/common/cnxk/roc_priv.h
+++ b/drivers/common/cnxk/roc_priv.h
@@ -32,4 +32,7 @@
 /* TIM */
 #include "roc_tim_priv.h"
 
+/* BPHY CGX */
+#include "roc_bphy_cgx_priv.h"
+
 #endif /* _ROC_PRIV_H_ */
-- 
2.25.1


  parent reply	other threads:[~2021-05-31 21:42 UTC|newest]

Thread overview: 104+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-31 21:41 [dpdk-dev] [PATCH 00/28] add support for baseband phy Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 01/28] common/cnxk: add bphy cgx/rpm initialization and cleanup Tomasz Duszynski
2021-05-31 21:41 ` Tomasz Duszynski [this message]
2021-06-10  5:06   ` [dpdk-dev] [PATCH 02/28] common/cnxk: add support for communication with atf Jerin Jacob
2021-05-31 21:41 ` [dpdk-dev] [PATCH 03/28] common/cnxk: add support for getting link information Tomasz Duszynski
2021-06-10  5:09   ` Jerin Jacob
2021-05-31 21:41 ` [dpdk-dev] [PATCH 04/28] common/cnxk: add support for changing internal loopback Tomasz Duszynski
2021-06-10  6:19   ` Jerin Jacob
2021-05-31 21:41 ` [dpdk-dev] [PATCH 05/28] common/cnxk: add support for changing ptp mode Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 06/28] common/cnxk: add support for setting link mode Tomasz Duszynski
2021-06-10  6:21   ` Jerin Jacob
2021-05-31 21:41 ` [dpdk-dev] [PATCH 07/28] common/cnxk: add support for changing link state Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 08/28] common/cnxk: add support for lmac start/stop Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 09/28] raw/cnxk_bphy: add bphy cgx/rpm skeleton driver Tomasz Duszynski
2021-06-01  7:30   ` Thomas Monjalon
2021-06-10  6:40   ` Jerin Jacob
2021-05-31 21:41 ` [dpdk-dev] [PATCH 10/28] raw/cnxk_bphy: add support for reading queue configuration Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 11/28] raw/cnxk_bphy: add support for reading queue count Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 12/28] raw/cnxk_bphy: add support for enqueue operation Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 13/28] raw/cnxk_bphy: add support for dequeue operation Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 14/28] raw/cnxk_bphy: add support for performing selftest Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 15/28] common/cnxk: add support for device init and fini Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 16/28] common/cnxk: add support for baseband phy irq setup Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 17/28] common/cnxk: add support for checking irq availability Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 18/28] common/cnxk: add support for retrieving irq stack Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 19/28] common/cnxk: add support for removing " Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 20/28] common/cnxk: add support for setting bphy irq handler Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 21/28] common/cnxk: add support for clearing " Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 22/28] common/cnxk: add support for registering bphy irq Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 23/28] raw/cnxk_bphy: add baseband phy skeleton driver Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 24/28] raw/cnxk_bphy: add support for interrupt init and cleanup Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 25/28] raw/cnxk_bphy: add support for reading number of irqs Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 26/28] raw/cnxk_bphy: add support for retrieving device memory Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 27/28] raw/cnxk_bphy: add support for registering irq handlers Tomasz Duszynski
2021-05-31 21:41 ` [dpdk-dev] [PATCH 28/28] raw/cnxk_bphy: add support for selftest Tomasz Duszynski
2021-06-10  6:54 ` [dpdk-dev] [PATCH 00/28] add support for baseband phy Jerin Jacob
2021-06-15 11:03 ` [dpdk-dev] [PATCH v2 00/32] " Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 01/32] common/cnxk: add bphy cgx/rpm initialization and cleanup Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 02/32] common/cnxk: support for communication with atf Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 03/32] common/cnxk: support for getting link information Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 04/32] common/cnxk: support for changing internal loopback Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 05/32] common/cnxk: support for changing ptp mode Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 06/32] common/cnxk: support for setting link mode Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 07/32] common/cnxk: support for changing link state Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 08/32] common/cnxk: support for lmac start/stop Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 09/32] raw/cnxk_bphy: add bphy cgx/rpm skeleton driver Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 10/32] raw/cnxk_bphy: support for reading queue configuration Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 11/32] raw/cnxk_bphy: support for reading queue count Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 12/32] raw/cnxk_bphy: support for enqueue operation Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 13/32] raw/cnxk_bphy: support for dequeue operation Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 14/32] raw/cnxk_bphy: support for performing selftest Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 15/32] common/cnxk: support for device init and fini Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 16/32] common/cnxk: support for baseband PHY irq setup Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 17/32] common/cnxk: support for checking irq availability Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 18/32] common/cnxk: support for retrieving irq stack Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 19/32] common/cnxk: support for removing " Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 20/32] common/cnxk: support for setting bphy irq handler Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 21/32] common/cnxk: support for clearing " Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 22/32] common/cnxk: support for registering bphy irq Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 23/32] raw/cnxk_bphy: add baseband PHY skeleton driver Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 24/32] raw/cnxk_bphy: support for reading bphy queue configuration Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 25/32] raw/cnxk_bphy: support for reading bphy queue count Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 26/32] raw/cnxk_bphy: support for bphy enqueue operation Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 27/32] raw/cnxk_bphy: support for bphy dequeue operation Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 28/32] raw/cnxk_bphy: support for interrupt init and cleanup Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 29/32] raw/cnxk_bphy: support for reading number of bphy irqs Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 30/32] raw/cnxk_bphy: support for retrieving bphy device memory Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 31/32] raw/cnxk_bphy: support for registering bphy irq handlers Tomasz Duszynski
2021-06-15 11:03   ` [dpdk-dev] [PATCH v2 32/32] raw/cnxk_bphy: support for bphy selftest Tomasz Duszynski
2021-06-21  8:43   ` [dpdk-dev] [PATCH v2 00/32] add support for baseband phy Jerin Jacob
2021-06-21 15:04 ` [dpdk-dev] [PATCH v3 " Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 01/32] common/cnxk: add bphy cgx/rpm initialization and cleanup Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 02/32] common/cnxk: support for communication with atf Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 03/32] common/cnxk: support for getting link information Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 04/32] common/cnxk: support for changing internal loopback Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 05/32] common/cnxk: support for changing ptp mode Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 06/32] common/cnxk: support for setting link mode Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 07/32] common/cnxk: support for changing link state Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 08/32] common/cnxk: support for lmac start/stop Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 09/32] raw/cnxk_bphy: add bphy cgx/rpm skeleton driver Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 10/32] raw/cnxk_bphy: support for reading queue configuration Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 11/32] raw/cnxk_bphy: support for reading queue count Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 12/32] raw/cnxk_bphy: support for enqueue operation Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 13/32] raw/cnxk_bphy: support for dequeue operation Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 14/32] raw/cnxk_bphy: support for performing selftest Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 15/32] common/cnxk: support for device init and fini Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 16/32] common/cnxk: support for baseband PHY irq setup Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 17/32] common/cnxk: support for checking irq availability Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 18/32] common/cnxk: support for retrieving irq stack Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 19/32] common/cnxk: support for removing " Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 20/32] common/cnxk: support for setting bphy irq handler Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 21/32] common/cnxk: support for clearing " Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 22/32] common/cnxk: support for registering bphy irq Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 23/32] raw/cnxk_bphy: add baseband PHY skeleton driver Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 24/32] raw/cnxk_bphy: support for reading bphy queue configuration Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 25/32] raw/cnxk_bphy: support for reading bphy queue count Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 26/32] raw/cnxk_bphy: support for bphy enqueue operation Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 27/32] raw/cnxk_bphy: support for bphy dequeue operation Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 28/32] raw/cnxk_bphy: support for interrupt init and cleanup Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 29/32] raw/cnxk_bphy: support for reading number of bphy irqs Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 30/32] raw/cnxk_bphy: support for retrieving bphy device memory Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 31/32] raw/cnxk_bphy: support for registering bphy irq handlers Tomasz Duszynski
2021-06-21 15:04   ` [dpdk-dev] [PATCH v3 32/32] raw/cnxk_bphy: support for bphy selftest Tomasz Duszynski
2021-07-05 21:12   ` [dpdk-dev] [PATCH v3 00/32] add support for baseband phy Thomas Monjalon

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210531214142.30167-3-tduszynski@marvell.com \
    --to=tduszynski@marvell.com \
    --cc=dev@dpdk.org \
    --cc=jerinj@marvell.com \
    --cc=jpalider@marvell.com \
    --cc=kirankumark@marvell.com \
    --cc=ndabilpuram@marvell.com \
    --cc=skori@marvell.com \
    --cc=skoteshwar@marvell.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).