From: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
To: <dev@dpdk.org>
Cc: <rasland@nvidia.com>, <matan@nvidia.com>,
<christian.ehrhardt@canonical.com>, <xuemingl@nvidia.com>,
<stable@dpdk.org>
Subject: [dpdk-dev] [PATCH] net/mlx5: fix receiving queue timestamp format
Date: Mon, 14 Jun 2021 16:52:42 +0300 [thread overview]
Message-ID: <20210614135242.6842-1-viacheslavo@nvidia.com> (raw)
The timestamp format was not configured correctly for the
receiving queues created via DevX calls. It caused non-UTC
timestamps in CQEs for real time configurations.
Fixes: d61381ad46d0 ("net/mlx5: support timestamp format")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
drivers/net/mlx5/mlx5_devx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c
index 78b88f99b4..a1db53577a 100644
--- a/drivers/net/mlx5/mlx5_devx.c
+++ b/drivers/net/mlx5/mlx5_devx.c
@@ -249,6 +249,7 @@ mlx5_rxq_create_devx_rq_resources(struct rte_eth_dev *dev, uint16_t idx)
rq_attr.vsd = (rxq_data->vlan_strip) ? 0 : 1;
rq_attr.cqn = rxq_ctrl->obj->cq_obj.cq->id;
rq_attr.scatter_fcs = (rxq_data->crc_present) ? 1 : 0;
+ rq_attr.ts_format = mlx5_ts_format_conv(priv->sh->rq_ts_format);
/* Fill WQ attributes for this RQ. */
if (mlx5_rxq_mprq_enabled(rxq_data)) {
rq_attr.wq_attr.wq_type = MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ;
--
2.18.1
next reply other threads:[~2021-06-14 13:53 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-14 13:52 Viacheslav Ovsiienko [this message]
2021-06-14 14:34 ` Matan Azrad
2021-06-15 11:01 ` Raslan Darawsheh
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