From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F211CA0C47; Tue, 15 Jun 2021 13:05:18 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D605541194; Tue, 15 Jun 2021 13:04:22 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id B18B141181 for ; Tue, 15 Jun 2021 13:04:19 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15FB0ITB012319 for ; Tue, 15 Jun 2021 04:04:19 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=E/YA8xIf+EF3c6RYBRD+ouyox/8HHxNr3Rk9YJbRWcA=; b=GZWRJkBUZ+HH5uALx+IZstnPI36DRm+7kFZuQ90gGsYrbXkzpIXmZmFLUxm1qBA6nrQU LqbEuyDPnhV/FlCidtSJOC1ZYvr6pJevP67CM9TENstNlg3wcYLCk5syRzSYLybU9KKy zOO4vbc6suoNveLT/3Uq3OjvCGbWIfiZXu/ZFy8bEG858V0BGlgd+l+II3QVLfNPsCHB bQ1HLtselayq4Vmrn+xDW3Ankglx0mrwAbLq7/GDMwMniRWDkLpOkOvBDmoaclpqIcP6 phyuhvWKXkWw7jlEug6DtdnhPz3VJhXCXj4yQKXGgnFu1arQIJIhn+ZCmxTEmhCAANQr Pg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 396tagr50p-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 15 Jun 2021 04:04:18 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 15 Jun 2021 04:04:18 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 15 Jun 2021 04:04:17 -0700 Received: from EH-LT0048.marvell.com (unknown [10.193.32.52]) by maili.marvell.com (Postfix) with ESMTP id C00913F70A6; Tue, 15 Jun 2021 04:04:16 -0700 (PDT) From: Tomasz Duszynski To: Jakub Palider , Tomasz Duszynski CC: Date: Tue, 15 Jun 2021 13:03:25 +0200 Message-ID: <20210615110345.11057-13-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210615110345.11057-1-tduszynski@marvell.com> References: <20210531214142.30167-1-tduszynski@marvell.com> <20210615110345.11057-1-tduszynski@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: kz4IUWQRPbpZ7h7odlckt8QA1C0K7HAx X-Proofpoint-GUID: kz4IUWQRPbpZ7h7odlckt8QA1C0K7HAx X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-06-15_04:2021-06-14, 2021-06-15 signatures=0 Subject: [dpdk-dev] [PATCH v2 12/32] raw/cnxk_bphy: support for enqueue operation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for enqueueing messages. Signed-off-by: Tomasz Duszynski Signed-off-by: Jakub Palider --- doc/guides/rawdevs/cnxk_bphy.rst | 68 ++++++++++++++++ drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c | 112 ++++++++++++++++++++++++++ drivers/raw/cnxk_bphy/meson.build | 1 + drivers/raw/cnxk_bphy/rte_pmd_bphy.h | 104 ++++++++++++++++++++++++ 4 files changed, 285 insertions(+) create mode 100644 drivers/raw/cnxk_bphy/rte_pmd_bphy.h diff --git a/doc/guides/rawdevs/cnxk_bphy.rst b/doc/guides/rawdevs/cnxk_bphy.rst index d6803e527..4015740f7 100644 --- a/doc/guides/rawdevs/cnxk_bphy.rst +++ b/doc/guides/rawdevs/cnxk_bphy.rst @@ -11,6 +11,13 @@ backed by ethernet I/O block called CGX or RPM (depending on the chip version). RFOE stands for Radio Frequency Over Ethernet and provides support for IEEE 1904.3 (RoE) standard. +Features +-------- + +The BPHY CGX/RPM implements following features in the rawdev API: + +- Access to BPHY CGX/RPM via a set of predefined messages + Device Setup ------------ @@ -25,3 +32,64 @@ devices alone. Before performing actual data transfer one needs to first retrieve number of available queues with ``rte_rawdev_queue_count()`` and capacity of each using ``rte_rawdev_queue_conf_get()``. + +To perform data transfer use standard ``rte_rawdev_enqueue_buffers()`` and +``rte_rawdev_dequeue_buffers()`` APIs. Not all messages produce sensible +responses hence dequeueing is not always necessary. + +BPHY CGX/RPM PMD accepts ``struct cnxk_bphy_cgx_msg`` messages which differ by type and payload. +Message types along with description are listed below. + +Get link information +~~~~~~~~~~~~~~~~~~~~ + +Message is used to get information about link state. + +Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO``. In response one will +get message containing payload i.e ``struct cnxk_bphy_cgx_msg_link_info`` filled with information +about current link state. + +Change internal loopback state +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Message is used to enable or disable internal loopback. + +Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_INTLBK_ENABLE`` or +``CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE``. Former will activate internal loobback while the latter +will do the opposite. + +Change PTP RX state +~~~~~~~~~~~~~~~~~~~ + +Message is used to enable or disable PTP mode. + +Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_ENABLE`` or +``CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_DISABLE``. Former will enable PTP while the latter will do the +opposite. + +Set link mode +~~~~~~~~~~~~~ + +Message is used to change link mode. + +Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_MODE``. Prior to sending actual +message payload i.e ``struct cnxk_bphy_cgx_msg_link_mode`` needs to be filled with relevant +information. + +Change link state +~~~~~~~~~~~~~~~~~ + +Message is used to set link up or down. + +Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE``. Prior to sending actual +message payload i.e ``struct cnxk_bphy_cgx_msg_set_link_state`` needs to be filled with relevant +information. + +Start or stop RX/TX +~~~~~~~~~~~~~~~~~~~ + +Message is used to start or stop accepting traffic. + +Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_START_RXTX`` or +``CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX``. Former will enable traffic while the latter will +do the opposite. diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c index da4372642..637514406 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c +++ b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c @@ -1,12 +1,16 @@ /* SPDX-License-Identifier: BSD-3-Clause * Copyright(C) 2021 Marvell. */ +#include + #include #include #include #include +#include "rte_pmd_bphy.h" + struct cnxk_bphy_cgx_queue { unsigned int lmac; /* queue holds up to one response */ @@ -46,6 +50,113 @@ cnxk_bphy_cgx_queue_def_conf(struct rte_rawdev *dev, uint16_t queue_id, return 0; } +static int +cnxk_bphy_cgx_process_buf(struct cnxk_bphy_cgx *cgx, unsigned int queue, + struct rte_rawdev_buf *buf) +{ + struct cnxk_bphy_cgx_queue *qp = &cgx->queues[queue]; + struct cnxk_bphy_cgx_msg_set_link_state *link_state; + struct cnxk_bphy_cgx_msg *msg = buf->buf_addr; + struct cnxk_bphy_cgx_msg_link_mode *link_mode; + struct cnxk_bphy_cgx_msg_link_info *link_info; + struct roc_bphy_cgx_link_info rlink_info; + struct roc_bphy_cgx_link_mode rlink_mode; + unsigned int lmac = qp->lmac; + void *rsp = NULL; + int ret; + + switch (msg->type) { + case CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO: + memset(&rlink_info, 0, sizeof(rlink_info)); + ret = roc_bphy_cgx_get_linkinfo(cgx->rcgx, lmac, &rlink_info); + if (ret) + break; + + link_info = rte_zmalloc(NULL, sizeof(*link_info), 0); + if (!link_info) + return -ENOMEM; + + link_info->link_up = rlink_info.link_up; + link_info->full_duplex = rlink_info.full_duplex; + link_info->speed = + (enum cnxk_bphy_cgx_eth_link_speed)rlink_info.speed; + link_info->autoneg = rlink_info.an; + link_info->fec = + (enum cnxk_bphy_cgx_eth_link_fec)rlink_info.fec; + link_info->mode = + (enum cnxk_bphy_cgx_eth_link_mode)rlink_info.mode; + rsp = link_info; + break; + case CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE: + ret = roc_bphy_cgx_intlbk_disable(cgx->rcgx, lmac); + break; + case CNXK_BPHY_CGX_MSG_TYPE_INTLBK_ENABLE: + ret = roc_bphy_cgx_intlbk_enable(cgx->rcgx, lmac); + break; + case CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_DISABLE: + ret = roc_bphy_cgx_ptp_rx_disable(cgx->rcgx, lmac); + break; + case CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_ENABLE: + ret = roc_bphy_cgx_ptp_rx_enable(cgx->rcgx, lmac); + break; + case CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_MODE: + link_mode = msg->data; + memset(&rlink_mode, 0, sizeof(rlink_mode)); + rlink_mode.full_duplex = link_mode->full_duplex; + rlink_mode.an = link_mode->autoneg; + rlink_mode.speed = + (enum roc_bphy_cgx_eth_link_speed)link_mode->speed; + rlink_mode.mode = + (enum roc_bphy_cgx_eth_link_mode)link_mode->mode; + ret = roc_bphy_cgx_set_link_mode(cgx->rcgx, lmac, &rlink_mode); + break; + case CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE: + link_state = msg->data; + ret = roc_bphy_cgx_set_link_state(cgx->rcgx, lmac, + link_state->state); + break; + case CNXK_BPHY_CGX_MSG_TYPE_START_RXTX: + ret = roc_bphy_cgx_start_rxtx(cgx->rcgx, lmac); + break; + case CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX: + ret = roc_bphy_cgx_stop_rxtx(cgx->rcgx, lmac); + break; + default: + return -EINVAL; + } + + /* get rid of last response if any */ + if (qp->rsp) { + RTE_LOG(WARNING, PMD, "Previous response got overwritten\n"); + rte_free(qp->rsp); + } + qp->rsp = rsp; + + return ret; +} + +static int +cnxk_bphy_cgx_enqueue_bufs(struct rte_rawdev *dev, + struct rte_rawdev_buf **buffers, unsigned int count, + rte_rawdev_obj_t context) +{ + struct cnxk_bphy_cgx *cgx = dev->dev_private; + unsigned int queue = (size_t)context; + int ret; + + if (queue >= cgx->num_queues) + return -EINVAL; + + if (count == 0) + return 0; + + ret = cnxk_bphy_cgx_process_buf(cgx, queue, buffers[0]); + if (ret) + return ret; + + return 1; +} + static uint16_t cnxk_bphy_cgx_queue_count(struct rte_rawdev *dev) { @@ -56,6 +167,7 @@ cnxk_bphy_cgx_queue_count(struct rte_rawdev *dev) static const struct rte_rawdev_ops cnxk_bphy_cgx_rawdev_ops = { .queue_def_conf = cnxk_bphy_cgx_queue_def_conf, + .enqueue_bufs = cnxk_bphy_cgx_enqueue_bufs, .queue_count = cnxk_bphy_cgx_queue_count, }; diff --git a/drivers/raw/cnxk_bphy/meson.build b/drivers/raw/cnxk_bphy/meson.build index 78d8081fe..0d65fc5c8 100644 --- a/drivers/raw/cnxk_bphy/meson.build +++ b/drivers/raw/cnxk_bphy/meson.build @@ -6,3 +6,4 @@ deps += ['bus_pci', 'common_cnxk', 'rawdev'] sources = files( 'cnxk_bphy_cgx.c', ) +headers = files('rte_pmd_bphy.h') diff --git a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h new file mode 100644 index 000000000..fed7916fe --- /dev/null +++ b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h @@ -0,0 +1,104 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef _CNXK_BPHY_H_ +#define _CNXK_BPHY_H_ + +enum cnxk_bphy_cgx_msg_type { + CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO, + CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE, + CNXK_BPHY_CGX_MSG_TYPE_INTLBK_ENABLE, + CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_DISABLE, + CNXK_BPHY_CGX_MSG_TYPE_PTP_RX_ENABLE, + CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_MODE, + CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE, + CNXK_BPHY_CGX_MSG_TYPE_START_RXTX, + CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX, +}; + +enum cnxk_bphy_cgx_eth_link_speed { + CNXK_BPHY_CGX_ETH_LINK_SPEED_NONE, + CNXK_BPHY_CGX_ETH_LINK_SPEED_10M, + CNXK_BPHY_CGX_ETH_LINK_SPEED_100M, + CNXK_BPHY_CGX_ETH_LINK_SPEED_1G, + CNXK_BPHY_CGX_ETH_LINK_SPEED_2HG, + CNXK_BPHY_CGX_ETH_LINK_SPEED_5G, + CNXK_BPHY_CGX_ETH_LINK_SPEED_10G, + CNXK_BPHY_CGX_ETH_LINK_SPEED_20G, + CNXK_BPHY_CGX_ETH_LINK_SPEED_25G, + CNXK_BPHY_CGX_ETH_LINK_SPEED_40G, + CNXK_BPHY_CGX_ETH_LINK_SPEED_50G, + CNXK_BPHY_CGX_ETH_LINK_SPEED_80G, + CNXK_BPHY_CGX_ETH_LINK_SPEED_100G, + __CNXK_BPHY_CGX_ETH_LINK_SPEED_MAX +}; + +enum cnxk_bphy_cgx_eth_link_fec { + CNXK_BPHY_CGX_ETH_LINK_FEC_NONE, + CNXK_BPHY_CGX_ETH_LINK_FEC_BASE_R, + CNXK_BPHY_CGX_ETH_LINK_FEC_RS, + __CNXK_BPHY_CGX_ETH_LINK_FEC_MAX +}; + +enum cnxk_bphy_cgx_eth_link_mode { + CNXK_BPHY_CGX_ETH_LINK_MODE_SGMII_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_1000_BASEX_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_QSGMII_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_10G_C2C_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_10G_C2M_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_10G_KR_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_20G_C2C_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_25G_C2C_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_25G_C2M_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_25G_2_C2C_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_25G_CR_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_25G_KR_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_40G_C2C_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_40G_C2M_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_40G_CR4_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_40G_KR4_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_40GAUI_C2C_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_50G_C2C_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_50G_C2M_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_50G_4_C2C_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_50G_CR_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_50G_KR_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_80GAUI_C2C_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_100G_C2C_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_100G_C2M_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_100G_CR4_BIT, + CNXK_BPHY_CGX_ETH_LINK_MODE_100G_KR4_BIT, + __CNXK_BPHY_CGX_ETH_LINK_MODE_MAX +}; + +struct cnxk_bphy_cgx_msg_link_mode { + bool full_duplex; + bool autoneg; + enum cnxk_bphy_cgx_eth_link_speed speed; + enum cnxk_bphy_cgx_eth_link_mode mode; +}; + +struct cnxk_bphy_cgx_msg_link_info { + bool link_up; + bool full_duplex; + enum cnxk_bphy_cgx_eth_link_speed speed; + bool autoneg; + enum cnxk_bphy_cgx_eth_link_fec fec; + enum cnxk_bphy_cgx_eth_link_mode mode; +}; + +struct cnxk_bphy_cgx_msg_set_link_state { + bool state; /* up or down */ +}; + +struct cnxk_bphy_cgx_msg { + enum cnxk_bphy_cgx_msg_type type; + /* + * data depends on message type and whether + * it's a request or a response + */ + void *data; +}; + +#endif /* _CNXK_BPHY_H_ */ -- 2.25.1