From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B63EFA0C4D; Thu, 17 Jun 2021 12:59:19 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 863B041145; Thu, 17 Jun 2021 12:58:28 +0200 (CEST) Received: from smtpbgau1.qq.com (smtpbgau1.qq.com [54.206.16.166]) by mails.dpdk.org (Postfix) with ESMTP id B1C5A40687 for ; Thu, 17 Jun 2021 12:58:25 +0200 (CEST) X-QQ-mid: bizesmtp46t1623927501ty5i8vyx Received: from wxdbg.localdomain.com (unknown [183.129.236.74]) by esmtp6.qq.com (ESMTP) with id ; Thu, 17 Jun 2021 18:58:20 +0800 (CST) X-QQ-SSF: 01400000000000D0E000B00A0000000 X-QQ-FEAT: 6Urm6peds7VCMIus9ImH74NrRjRYnIpqQhiZTzt1DaoiRFASujgxGs5y7rSRT E52GhzeNAqt+Rw23tsnQBdzZNt/0x2afPIFNQVOCbEWK4tWeIGf0tgTgySHwOFKb+wXkxIQ AFpM3OjMh9tjkxmhplVhIbQmCnE597FgY+UMM3BTUUE4LY/02fhDcT39GhkV5LNvnDUp8t2 DEPg8Xd0yuRMzmj6Te05gp2gSQqEpwZkcJuiNxedoxJETgAKPeT9MEsPrqT7Iw4W9PM+Els ihuRVLe2A+dHBRIQ5AAMTJE4NXdZXkhGSgy5Dqt30lLJkXh9/3KUQ1DO43bpkK9/3U1hiZ1 EjYCKiP+lK57nV+grNq8yFZ7T15Hg== X-QQ-GoodBg: 2 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Date: Thu, 17 Jun 2021 18:59:55 +0800 Message-Id: <20210617110005.4132926-10-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210617110005.4132926-1-jiawenwu@trustnetic.com> References: <20210617110005.4132926-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybgforeign:qybgforeign1 X-QQ-Bgrelay: 1 Subject: [dpdk-dev] [PATCH v6 09/19] net/ngbe: store MAC address X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Store MAC addresses and init receive address filters. Signed-off-by: Jiawen Wu --- drivers/net/ngbe/base/ngbe_dummy.h | 33 +++ drivers/net/ngbe/base/ngbe_hw.c | 323 +++++++++++++++++++++++++++++ drivers/net/ngbe/base/ngbe_hw.h | 13 ++ drivers/net/ngbe/base/ngbe_type.h | 19 ++ drivers/net/ngbe/ngbe_ethdev.c | 25 +++ drivers/net/ngbe/ngbe_ethdev.h | 2 + 6 files changed, 415 insertions(+) diff --git a/drivers/net/ngbe/base/ngbe_dummy.h b/drivers/net/ngbe/base/ngbe_dummy.h index 15017cfd82..8462d6d1cb 100644 --- a/drivers/net/ngbe/base/ngbe_dummy.h +++ b/drivers/net/ngbe/base/ngbe_dummy.h @@ -51,6 +51,10 @@ static inline s32 ngbe_mac_stop_hw_dummy(struct ngbe_hw *TUP0) { return NGBE_ERR_OPS_DUMMY; } +static inline s32 ngbe_mac_get_mac_addr_dummy(struct ngbe_hw *TUP0, u8 *TUP1) +{ + return NGBE_ERR_OPS_DUMMY; +} static inline s32 ngbe_mac_acquire_swfw_sync_dummy(struct ngbe_hw *TUP0, u32 TUP1) { @@ -60,6 +64,29 @@ static inline void ngbe_mac_release_swfw_sync_dummy(struct ngbe_hw *TUP0, u32 TUP1) { } +static inline s32 ngbe_mac_set_rar_dummy(struct ngbe_hw *TUP0, u32 TUP1, + u8 *TUP2, u32 TUP3, u32 TUP4) +{ + return NGBE_ERR_OPS_DUMMY; +} +static inline s32 ngbe_mac_clear_rar_dummy(struct ngbe_hw *TUP0, u32 TUP1) +{ + return NGBE_ERR_OPS_DUMMY; +} +static inline s32 ngbe_mac_set_vmdq_dummy(struct ngbe_hw *TUP0, u32 TUP1, + u32 TUP2) +{ + return NGBE_ERR_OPS_DUMMY; +} +static inline s32 ngbe_mac_clear_vmdq_dummy(struct ngbe_hw *TUP0, u32 TUP1, + u32 TUP2) +{ + return NGBE_ERR_OPS_DUMMY; +} +static inline s32 ngbe_mac_init_rx_addrs_dummy(struct ngbe_hw *TUP0) +{ + return NGBE_ERR_OPS_DUMMY; +} static inline s32 ngbe_mac_init_thermal_ssth_dummy(struct ngbe_hw *TUP0) { return NGBE_ERR_OPS_DUMMY; @@ -105,8 +132,14 @@ static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw) hw->mac.init_hw = ngbe_mac_init_hw_dummy; hw->mac.reset_hw = ngbe_mac_reset_hw_dummy; hw->mac.stop_hw = ngbe_mac_stop_hw_dummy; + hw->mac.get_mac_addr = ngbe_mac_get_mac_addr_dummy; hw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy; hw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy; + hw->mac.set_rar = ngbe_mac_set_rar_dummy; + hw->mac.clear_rar = ngbe_mac_clear_rar_dummy; + hw->mac.set_vmdq = ngbe_mac_set_vmdq_dummy; + hw->mac.clear_vmdq = ngbe_mac_clear_vmdq_dummy; + hw->mac.init_rx_addrs = ngbe_mac_init_rx_addrs_dummy; hw->mac.init_thermal_sensor_thresh = ngbe_mac_init_thermal_ssth_dummy; hw->mac.check_overtemp = ngbe_mac_check_overtemp_dummy; hw->phy.identify = ngbe_phy_identify_dummy; diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c index 5723213209..7f20d6c807 100644 --- a/drivers/net/ngbe/base/ngbe_hw.c +++ b/drivers/net/ngbe/base/ngbe_hw.c @@ -142,9 +142,49 @@ s32 ngbe_reset_hw_em(struct ngbe_hw *hw) msec_delay(50); + /* Store the permanent mac address */ + hw->mac.get_mac_addr(hw, hw->mac.perm_addr); + + /* + * Store MAC address from RAR0, clear receive address registers, and + * clear the multicast table. + */ + hw->mac.num_rar_entries = NGBE_EM_RAR_ENTRIES; + hw->mac.init_rx_addrs(hw); + return status; } +/** + * ngbe_get_mac_addr - Generic get MAC address + * @hw: pointer to hardware structure + * @mac_addr: Adapter MAC address + * + * Reads the adapter's MAC address from first Receive Address Register (RAR0) + * A reset of the adapter must be performed prior to calling this function + * in order for the MAC address to have been loaded from the EEPROM into RAR0 + **/ +s32 ngbe_get_mac_addr(struct ngbe_hw *hw, u8 *mac_addr) +{ + u32 rar_high; + u32 rar_low; + u16 i; + + DEBUGFUNC("ngbe_get_mac_addr"); + + wr32(hw, NGBE_ETHADDRIDX, 0); + rar_high = rd32(hw, NGBE_ETHADDRH); + rar_low = rd32(hw, NGBE_ETHADDRL); + + for (i = 0; i < 2; i++) + mac_addr[i] = (u8)(rar_high >> (1 - i) * 8); + + for (i = 0; i < 4; i++) + mac_addr[i + 2] = (u8)(rar_low >> (3 - i) * 8); + + return 0; +} + /** * ngbe_set_lan_id_multi_port - Set LAN id for PCIe multiple port devices * @hw: pointer to the HW structure @@ -215,6 +255,196 @@ s32 ngbe_stop_hw(struct ngbe_hw *hw) return 0; } +/** + * ngbe_validate_mac_addr - Validate MAC address + * @mac_addr: pointer to MAC address. + * + * Tests a MAC address to ensure it is a valid Individual Address. + **/ +s32 ngbe_validate_mac_addr(u8 *mac_addr) +{ + s32 status = 0; + + DEBUGFUNC("ngbe_validate_mac_addr"); + + /* Make sure it is not a multicast address */ + if (NGBE_IS_MULTICAST((struct rte_ether_addr *)mac_addr)) { + status = NGBE_ERR_INVALID_MAC_ADDR; + /* Not a broadcast address */ + } else if (NGBE_IS_BROADCAST((struct rte_ether_addr *)mac_addr)) { + status = NGBE_ERR_INVALID_MAC_ADDR; + /* Reject the zero address */ + } else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 && + mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) { + status = NGBE_ERR_INVALID_MAC_ADDR; + } + return status; +} + +/** + * ngbe_set_rar - Set Rx address register + * @hw: pointer to hardware structure + * @index: Receive address register to write + * @addr: Address to put into receive address register + * @vmdq: VMDq "set" or "pool" index + * @enable_addr: set flag that address is active + * + * Puts an ethernet address into a receive address register. + **/ +s32 ngbe_set_rar(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq, + u32 enable_addr) +{ + u32 rar_low, rar_high; + u32 rar_entries = hw->mac.num_rar_entries; + + DEBUGFUNC("ngbe_set_rar"); + + /* Make sure we are using a valid rar index range */ + if (index >= rar_entries) { + DEBUGOUT("RAR index %d is out of range.\n", index); + return NGBE_ERR_INVALID_ARGUMENT; + } + + /* setup VMDq pool selection before this RAR gets enabled */ + hw->mac.set_vmdq(hw, index, vmdq); + + /* + * HW expects these in little endian so we reverse the byte + * order from network order (big endian) to little endian + */ + rar_low = NGBE_ETHADDRL_AD0(addr[5]) | + NGBE_ETHADDRL_AD1(addr[4]) | + NGBE_ETHADDRL_AD2(addr[3]) | + NGBE_ETHADDRL_AD3(addr[2]); + /* + * Some parts put the VMDq setting in the extra RAH bits, + * so save everything except the lower 16 bits that hold part + * of the address and the address valid bit. + */ + rar_high = rd32(hw, NGBE_ETHADDRH); + rar_high &= ~NGBE_ETHADDRH_AD_MASK; + rar_high |= (NGBE_ETHADDRH_AD4(addr[1]) | + NGBE_ETHADDRH_AD5(addr[0])); + + rar_high &= ~NGBE_ETHADDRH_VLD; + if (enable_addr != 0) + rar_high |= NGBE_ETHADDRH_VLD; + + wr32(hw, NGBE_ETHADDRIDX, index); + wr32(hw, NGBE_ETHADDRL, rar_low); + wr32(hw, NGBE_ETHADDRH, rar_high); + + return 0; +} + +/** + * ngbe_clear_rar - Remove Rx address register + * @hw: pointer to hardware structure + * @index: Receive address register to write + * + * Clears an ethernet address from a receive address register. + **/ +s32 ngbe_clear_rar(struct ngbe_hw *hw, u32 index) +{ + u32 rar_high; + u32 rar_entries = hw->mac.num_rar_entries; + + DEBUGFUNC("ngbe_clear_rar"); + + /* Make sure we are using a valid rar index range */ + if (index >= rar_entries) { + DEBUGOUT("RAR index %d is out of range.\n", index); + return NGBE_ERR_INVALID_ARGUMENT; + } + + /* + * Some parts put the VMDq setting in the extra RAH bits, + * so save everything except the lower 16 bits that hold part + * of the address and the address valid bit. + */ + wr32(hw, NGBE_ETHADDRIDX, index); + rar_high = rd32(hw, NGBE_ETHADDRH); + rar_high &= ~(NGBE_ETHADDRH_AD_MASK | NGBE_ETHADDRH_VLD); + + wr32(hw, NGBE_ETHADDRL, 0); + wr32(hw, NGBE_ETHADDRH, rar_high); + + /* clear VMDq pool/queue selection for this RAR */ + hw->mac.clear_vmdq(hw, index, BIT_MASK32); + + return 0; +} + +/** + * ngbe_init_rx_addrs - Initializes receive address filters. + * @hw: pointer to hardware structure + * + * Places the MAC address in receive address register 0 and clears the rest + * of the receive address registers. Clears the multicast table. Assumes + * the receiver is in reset when the routine is called. + **/ +s32 ngbe_init_rx_addrs(struct ngbe_hw *hw) +{ + u32 i; + u32 psrctl; + u32 rar_entries = hw->mac.num_rar_entries; + + DEBUGFUNC("ngbe_init_rx_addrs"); + + /* + * If the current mac address is valid, assume it is a software override + * to the permanent address. + * Otherwise, use the permanent address from the eeprom. + */ + if (ngbe_validate_mac_addr(hw->mac.addr) == + NGBE_ERR_INVALID_MAC_ADDR) { + /* Get the MAC address from the RAR0 for later reference */ + hw->mac.get_mac_addr(hw, hw->mac.addr); + + DEBUGOUT(" Keeping Current RAR0 Addr =%.2X %.2X %.2X ", + hw->mac.addr[0], hw->mac.addr[1], + hw->mac.addr[2]); + DEBUGOUT("%.2X %.2X %.2X\n", hw->mac.addr[3], + hw->mac.addr[4], hw->mac.addr[5]); + } else { + /* Setup the receive address. */ + DEBUGOUT("Overriding MAC Address in RAR[0]\n"); + DEBUGOUT(" New MAC Addr =%.2X %.2X %.2X ", + hw->mac.addr[0], hw->mac.addr[1], + hw->mac.addr[2]); + DEBUGOUT("%.2X %.2X %.2X\n", hw->mac.addr[3], + hw->mac.addr[4], hw->mac.addr[5]); + + hw->mac.set_rar(hw, 0, hw->mac.addr, 0, true); + } + + /* clear VMDq pool/queue selection for RAR 0 */ + hw->mac.clear_vmdq(hw, 0, BIT_MASK32); + + /* Zero out the other receive addresses. */ + DEBUGOUT("Clearing RAR[1-%d]\n", rar_entries - 1); + for (i = 1; i < rar_entries; i++) { + wr32(hw, NGBE_ETHADDRIDX, i); + wr32(hw, NGBE_ETHADDRL, 0); + wr32(hw, NGBE_ETHADDRH, 0); + } + + /* Clear the MTA */ + hw->addr_ctrl.mta_in_use = 0; + psrctl = rd32(hw, NGBE_PSRCTL); + psrctl &= ~(NGBE_PSRCTL_ADHF12_MASK | NGBE_PSRCTL_MCHFENA); + psrctl |= NGBE_PSRCTL_ADHF12(hw->mac.mc_filter_type); + wr32(hw, NGBE_PSRCTL, psrctl); + + DEBUGOUT(" Clearing MTA\n"); + for (i = 0; i < hw->mac.mcft_size; i++) + wr32(hw, NGBE_MCADDRTBL(i), 0); + + ngbe_init_uta_tables(hw); + + return 0; +} + /** * ngbe_acquire_swfw_sync - Acquire SWFW semaphore * @hw: pointer to hardware structure @@ -286,6 +516,89 @@ void ngbe_release_swfw_sync(struct ngbe_hw *hw, u32 mask) ngbe_release_eeprom_semaphore(hw); } +/** + * ngbe_clear_vmdq - Disassociate a VMDq pool index from a rx address + * @hw: pointer to hardware struct + * @rar: receive address register index to disassociate + * @vmdq: VMDq pool index to remove from the rar + **/ +s32 ngbe_clear_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq) +{ + u32 mpsar; + u32 rar_entries = hw->mac.num_rar_entries; + + DEBUGFUNC("ngbe_clear_vmdq"); + + /* Make sure we are using a valid rar index range */ + if (rar >= rar_entries) { + DEBUGOUT("RAR index %d is out of range.\n", rar); + return NGBE_ERR_INVALID_ARGUMENT; + } + + wr32(hw, NGBE_ETHADDRIDX, rar); + mpsar = rd32(hw, NGBE_ETHADDRASS); + + if (NGBE_REMOVED(hw->hw_addr)) + goto done; + + if (!mpsar) + goto done; + + mpsar &= ~(1 << vmdq); + wr32(hw, NGBE_ETHADDRASS, mpsar); + + /* was that the last pool using this rar? */ + if (mpsar == 0 && rar != 0) + hw->mac.clear_rar(hw, rar); +done: + return 0; +} + +/** + * ngbe_set_vmdq - Associate a VMDq pool index with a rx address + * @hw: pointer to hardware struct + * @rar: receive address register index to associate with a VMDq index + * @vmdq: VMDq pool index + **/ +s32 ngbe_set_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq) +{ + u32 mpsar; + u32 rar_entries = hw->mac.num_rar_entries; + + DEBUGFUNC("ngbe_set_vmdq"); + + /* Make sure we are using a valid rar index range */ + if (rar >= rar_entries) { + DEBUGOUT("RAR index %d is out of range.\n", rar); + return NGBE_ERR_INVALID_ARGUMENT; + } + + wr32(hw, NGBE_ETHADDRIDX, rar); + + mpsar = rd32(hw, NGBE_ETHADDRASS); + mpsar |= 1 << vmdq; + wr32(hw, NGBE_ETHADDRASS, mpsar); + + return 0; +} + +/** + * ngbe_init_uta_tables - Initialize the Unicast Table Array + * @hw: pointer to hardware structure + **/ +s32 ngbe_init_uta_tables(struct ngbe_hw *hw) +{ + int i; + + DEBUGFUNC("ngbe_init_uta_tables"); + DEBUGOUT(" Clearing UTA\n"); + + for (i = 0; i < 128; i++) + wr32(hw, NGBE_UCADDRTBL(i), 0); + + return 0; +} + /** * ngbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds * @hw: pointer to hardware structure @@ -481,10 +794,18 @@ s32 ngbe_init_ops_pf(struct ngbe_hw *hw) /* MAC */ mac->init_hw = ngbe_init_hw; mac->reset_hw = ngbe_reset_hw_em; + mac->get_mac_addr = ngbe_get_mac_addr; mac->stop_hw = ngbe_stop_hw; mac->acquire_swfw_sync = ngbe_acquire_swfw_sync; mac->release_swfw_sync = ngbe_release_swfw_sync; + /* RAR */ + mac->set_rar = ngbe_set_rar; + mac->clear_rar = ngbe_clear_rar; + mac->init_rx_addrs = ngbe_init_rx_addrs; + mac->set_vmdq = ngbe_set_vmdq; + mac->clear_vmdq = ngbe_clear_vmdq; + /* Manageability interface */ mac->init_thermal_sensor_thresh = ngbe_init_thermal_sensor_thresh; mac->check_overtemp = ngbe_mac_check_overtemp; @@ -493,6 +814,8 @@ s32 ngbe_init_ops_pf(struct ngbe_hw *hw) rom->init_params = ngbe_init_eeprom_params; rom->validate_checksum = ngbe_validate_eeprom_checksum_em; + mac->mcft_size = NGBE_EM_MC_TBL_SIZE; + mac->num_rar_entries = NGBE_EM_RAR_ENTRIES; mac->max_rx_queues = NGBE_EM_MAX_RX_QUEUES; mac->max_tx_queues = NGBE_EM_MAX_TX_QUEUES; diff --git a/drivers/net/ngbe/base/ngbe_hw.h b/drivers/net/ngbe/base/ngbe_hw.h index 3c8e646bb7..0b3d60ae29 100644 --- a/drivers/net/ngbe/base/ngbe_hw.h +++ b/drivers/net/ngbe/base/ngbe_hw.h @@ -10,16 +10,29 @@ #define NGBE_EM_MAX_TX_QUEUES 8 #define NGBE_EM_MAX_RX_QUEUES 8 +#define NGBE_EM_RAR_ENTRIES 32 +#define NGBE_EM_MC_TBL_SIZE 32 s32 ngbe_init_hw(struct ngbe_hw *hw); s32 ngbe_reset_hw_em(struct ngbe_hw *hw); s32 ngbe_stop_hw(struct ngbe_hw *hw); +s32 ngbe_get_mac_addr(struct ngbe_hw *hw, u8 *mac_addr); void ngbe_set_lan_id_multi_port(struct ngbe_hw *hw); +s32 ngbe_set_rar(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq, + u32 enable_addr); +s32 ngbe_clear_rar(struct ngbe_hw *hw, u32 index); +s32 ngbe_init_rx_addrs(struct ngbe_hw *hw); + +s32 ngbe_validate_mac_addr(u8 *mac_addr); s32 ngbe_acquire_swfw_sync(struct ngbe_hw *hw, u32 mask); void ngbe_release_swfw_sync(struct ngbe_hw *hw, u32 mask); +s32 ngbe_set_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq); +s32 ngbe_clear_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq); +s32 ngbe_init_uta_tables(struct ngbe_hw *hw); + s32 ngbe_init_thermal_sensor_thresh(struct ngbe_hw *hw); s32 ngbe_mac_check_overtemp(struct ngbe_hw *hw); void ngbe_disable_rx(struct ngbe_hw *hw); diff --git a/drivers/net/ngbe/base/ngbe_type.h b/drivers/net/ngbe/base/ngbe_type.h index 8ed14560c3..517db3380d 100644 --- a/drivers/net/ngbe/base/ngbe_type.h +++ b/drivers/net/ngbe/base/ngbe_type.h @@ -63,6 +63,10 @@ enum ngbe_media_type { struct ngbe_hw; +struct ngbe_addr_filter_info { + u32 mta_in_use; +}; + /* Bus parameters */ struct ngbe_bus_info { void (*set_lan_id)(struct ngbe_hw *hw); @@ -89,14 +93,28 @@ struct ngbe_mac_info { s32 (*init_hw)(struct ngbe_hw *hw); s32 (*reset_hw)(struct ngbe_hw *hw); s32 (*stop_hw)(struct ngbe_hw *hw); + s32 (*get_mac_addr)(struct ngbe_hw *hw, u8 *mac_addr); s32 (*acquire_swfw_sync)(struct ngbe_hw *hw, u32 mask); void (*release_swfw_sync)(struct ngbe_hw *hw, u32 mask); + /* RAR */ + s32 (*set_rar)(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq, + u32 enable_addr); + s32 (*clear_rar)(struct ngbe_hw *hw, u32 index); + s32 (*set_vmdq)(struct ngbe_hw *hw, u32 rar, u32 vmdq); + s32 (*clear_vmdq)(struct ngbe_hw *hw, u32 rar, u32 vmdq); + s32 (*init_rx_addrs)(struct ngbe_hw *hw); + /* Manageability interface */ s32 (*init_thermal_sensor_thresh)(struct ngbe_hw *hw); s32 (*check_overtemp)(struct ngbe_hw *hw); enum ngbe_mac_type type; + u8 addr[ETH_ADDR_LEN]; + u8 perm_addr[ETH_ADDR_LEN]; + s32 mc_filter_type; + u32 mcft_size; + u32 num_rar_entries; u32 max_tx_queues; u32 max_rx_queues; struct ngbe_thermal_sensor_data thermal_sensor_data; @@ -128,6 +146,7 @@ struct ngbe_hw { void IOMEM *hw_addr; void *back; struct ngbe_mac_info mac; + struct ngbe_addr_filter_info addr_ctrl; struct ngbe_phy_info phy; struct ngbe_rom_info rom; struct ngbe_bus_info bus; diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index 31d4dda976..deca64137d 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -116,6 +116,31 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) return -EIO; } + /* Allocate memory for storing MAC addresses */ + eth_dev->data->mac_addrs = rte_zmalloc("ngbe", RTE_ETHER_ADDR_LEN * + hw->mac.num_rar_entries, 0); + if (eth_dev->data->mac_addrs == NULL) { + PMD_INIT_LOG(ERR, + "Failed to allocate %u bytes needed to store " + "MAC addresses", + RTE_ETHER_ADDR_LEN * hw->mac.num_rar_entries); + return -ENOMEM; + } + + /* Copy the permanent MAC address */ + rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.perm_addr, + ð_dev->data->mac_addrs[0]); + + /* Allocate memory for storing hash filter MAC addresses */ + eth_dev->data->hash_mac_addrs = rte_zmalloc("ngbe", + RTE_ETHER_ADDR_LEN * NGBE_VMDQ_NUM_UC_MAC, 0); + if (eth_dev->data->hash_mac_addrs == NULL) { + PMD_INIT_LOG(ERR, + "Failed to allocate %d bytes needed to store MAC addresses", + RTE_ETHER_ADDR_LEN * NGBE_VMDQ_NUM_UC_MAC); + return -ENOMEM; + } + return 0; } diff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h index d4d02c6bd8..87cc1cff6b 100644 --- a/drivers/net/ngbe/ngbe_ethdev.h +++ b/drivers/net/ngbe/ngbe_ethdev.h @@ -30,4 +30,6 @@ ngbe_dev_hw(struct rte_eth_dev *dev) return hw; } +#define NGBE_VMDQ_NUM_UC_MAC 4096 /* Maximum nb. of UC MAC addr. */ + #endif /* _NGBE_ETHDEV_H_ */ -- 2.21.0.windows.1