From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DA8FBA0C41; Wed, 23 Jun 2021 06:51:06 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 56D8C410FC; Wed, 23 Jun 2021 06:49:07 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id C05D44117B for ; Wed, 23 Jun 2021 06:49:05 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15N4k9oo025587 for ; Tue, 22 Jun 2021 21:49:05 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=znKvxQJGsgBYABnPdk/1UuihzkMWlLLY5ilkf2qae9Y=; b=MFZVtuUZRTJbQjYUWKNrBWkIobgAXw8wKiWoD07lEeBWIECGvaxEUXtViaCw09Eoivw9 1LKGu748dRvkhV3AZWvmKh9WKYK6HVPIEdPgmJVcc9QA0jVQ+WC0AwxbxHVoWVownaZ7 M+yqdS7dbX96Y4IXSJ80LNafKNIJoR8ClFgjpelNT1bdPsHt+gDQEErF9FUpBMNxQvQ5 Y7Hr8LQSEFjNcsDj7WbAWkhX07ZWk20pdR8Zw0ifyYokuSpSlOI/2blceU6wQ/bTIF4M 2SlFVycqdTgdUxrYbOwgiyXRGE102PulUmLJF4iNmv37Gqv2B5zG+bGU/oTcbr9QbO4Z zA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 39bptj1gqh-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 22 Jun 2021 21:49:05 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 22 Jun 2021 21:49:03 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 22 Jun 2021 21:49:03 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id DC6D15B6947; Tue, 22 Jun 2021 21:49:00 -0700 (PDT) From: Nithin Dabilpuram To: CC: , , , , , , , Date: Wed, 23 Jun 2021 10:16:32 +0530 Message-ID: <20210623044702.4240-33-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20210623044702.4240-1-ndabilpuram@marvell.com> References: <20210306153404.10781-1-ndabilpuram@marvell.com> <20210623044702.4240-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-ORIG-GUID: dcUB0f3an9TpQ_dyqZv14PVfM_Wops4N X-Proofpoint-GUID: dcUB0f3an9TpQ_dyqZv14PVfM_Wops4N X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-06-23_01:2021-06-22, 2021-06-23 signatures=0 Subject: [dpdk-dev] [PATCH v4 32/62] net/cnxk: add MAC address set ops X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori Default mac address set operation is implemented for cn9k and cn10k platforms. Signed-off-by: Sunil Kumar Kori --- drivers/net/cnxk/cnxk_ethdev.c | 1 + drivers/net/cnxk/cnxk_ethdev.h | 2 ++ drivers/net/cnxk/cnxk_ethdev_ops.c | 29 +++++++++++++++++++++++++++++ 3 files changed, 32 insertions(+) diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index d4587f0..58d2f7d 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -1046,6 +1046,7 @@ cnxk_nix_dev_start(struct rte_eth_dev *eth_dev) /* CNXK platform independent eth dev ops */ struct eth_dev_ops cnxk_eth_dev_ops = { + .mac_addr_set = cnxk_nix_mac_addr_set, .dev_infos_get = cnxk_nix_info_get, .link_update = cnxk_nix_link_update, .tx_queue_release = cnxk_nix_tx_queue_release, diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h index 50c75e1..a5380a5 100644 --- a/drivers/net/cnxk/cnxk_ethdev.h +++ b/drivers/net/cnxk/cnxk_ethdev.h @@ -218,6 +218,8 @@ extern struct eth_dev_ops cnxk_eth_dev_ops; int cnxk_nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev); int cnxk_nix_remove(struct rte_pci_device *pci_dev); +int cnxk_nix_mac_addr_set(struct rte_eth_dev *eth_dev, + struct rte_ether_addr *addr); int cnxk_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *dev_info); int cnxk_nix_configure(struct rte_eth_dev *eth_dev); diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c index 4a45956..87cf4ee 100644 --- a/drivers/net/cnxk/cnxk_ethdev_ops.c +++ b/drivers/net/cnxk/cnxk_ethdev_ops.c @@ -69,3 +69,32 @@ cnxk_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *devinfo) RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP; return 0; } + +int +cnxk_nix_mac_addr_set(struct rte_eth_dev *eth_dev, struct rte_ether_addr *addr) +{ + struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); + struct roc_nix *nix = &dev->nix; + int rc; + + /* Update mac address at NPC */ + rc = roc_nix_npc_mac_addr_set(nix, addr->addr_bytes); + if (rc) + goto exit; + + /* Update mac address at CGX for PFs only */ + if (!roc_nix_is_vf_or_sdp(nix)) { + rc = roc_nix_mac_addr_set(nix, addr->addr_bytes); + if (rc) { + /* Rollback to previous mac address */ + roc_nix_npc_mac_addr_set(nix, dev->mac_addr); + goto exit; + } + } + + /* Update mac address to cnxk ethernet device */ + rte_memcpy(dev->mac_addr, addr->addr_bytes, RTE_ETHER_ADDR_LEN); + +exit: + return rc; +} -- 2.8.4