From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 76AB0A0C41; Wed, 23 Jun 2021 06:53:33 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 49EEB41101; Wed, 23 Jun 2021 06:50:30 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 1572E41122 for ; Wed, 23 Jun 2021 06:50:27 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15N4k9pJ025587 for ; Tue, 22 Jun 2021 21:50:27 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=RDywea/1z5zx5c/Fq+SUdLecbp+3Ge0UlzDws5CMIFg=; b=Gh1gbhg86lvfegJpawbVwfwomD1HPej7/JLlDTnNLZBA89rzSJlAf0uSeQMkt67p74Cj 1k21nG+HZe9DoJTzDoiRmW7duZDaaqr4mIItx6tOiJItiif+NXzm41XreoVWfwg8HAWN 0rDVUOoEeIw7UbIpWo5+7CIBU5Q+VhjTb0vwhEavSSUJQHKmDXxQq+V7JS10/mejtljv wA6Jd8oYCP6c53GzjCg/8GPtr9Y3toy030DH7/urT1VYq9Laf2CCLljcSwAofo8c5nsu CnKW4uukTvjpbWJl0N94rJM8Ku4vkpalGgBg25ucvL8/9/br/76/cF04tok14g7TP3om Yg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 39bptj1gwk-8 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 22 Jun 2021 21:50:27 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 22 Jun 2021 21:50:21 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 22 Jun 2021 21:50:21 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 3022A5B6964; Tue, 22 Jun 2021 21:50:15 -0700 (PDT) From: Nithin Dabilpuram To: CC: , , , , , , , Date: Wed, 23 Jun 2021 10:16:56 +0530 Message-ID: <20210623044702.4240-57-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20210623044702.4240-1-ndabilpuram@marvell.com> References: <20210306153404.10781-1-ndabilpuram@marvell.com> <20210623044702.4240-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-ORIG-GUID: -ih_oM2WX0hMd563UTVWfleEReLMjydr X-Proofpoint-GUID: -ih_oM2WX0hMd563UTVWfleEReLMjydr X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-06-23_01:2021-06-22, 2021-06-23 signatures=0 Subject: [dpdk-dev] [PATCH v4 56/62] net/cnxk: add timesync enable/disable operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori Patch implements timesync enable/disable operations for cn9k and cn10k platforms. Signed-off-by: Sunil Kumar Kori --- drivers/net/cnxk/cn10k_ethdev.c | 50 +++++++++++++++++++++++++++++++++++++++++ drivers/net/cnxk/cn9k_ethdev.c | 50 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 100 insertions(+) diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c index 5e0de13..b079edb 100644 --- a/drivers/net/cnxk/cn10k_ethdev.c +++ b/drivers/net/cnxk/cn10k_ethdev.c @@ -363,6 +363,54 @@ cn10k_nix_ptp_info_update_cb(struct roc_nix *nix, bool ptp_en) } static int +cn10k_nix_timesync_enable(struct rte_eth_dev *eth_dev) +{ + struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); + int i, rc; + + rc = cnxk_nix_timesync_enable(eth_dev); + if (rc) + return rc; + + dev->rx_offload_flags |= NIX_RX_OFFLOAD_TSTAMP_F; + dev->tx_offload_flags |= NIX_TX_OFFLOAD_TSTAMP_F; + + for (i = 0; i < eth_dev->data->nb_tx_queues; i++) + nix_form_default_desc(dev, eth_dev->data->tx_queues[i], i); + + /* Setting up the rx[tx]_offload_flags due to change + * in rx[tx]_offloads. + */ + cn10k_eth_set_rx_function(eth_dev); + cn10k_eth_set_tx_function(eth_dev); + return 0; +} + +static int +cn10k_nix_timesync_disable(struct rte_eth_dev *eth_dev) +{ + struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); + int i, rc; + + rc = cnxk_nix_timesync_disable(eth_dev); + if (rc) + return rc; + + dev->rx_offload_flags &= ~NIX_RX_OFFLOAD_TSTAMP_F; + dev->tx_offload_flags &= ~NIX_TX_OFFLOAD_TSTAMP_F; + + for (i = 0; i < eth_dev->data->nb_tx_queues; i++) + nix_form_default_desc(dev, eth_dev->data->tx_queues[i], i); + + /* Setting up the rx[tx]_offload_flags due to change + * in rx[tx]_offloads. + */ + cn10k_eth_set_rx_function(eth_dev); + cn10k_eth_set_tx_function(eth_dev); + return 0; +} + +static int cn10k_nix_dev_start(struct rte_eth_dev *eth_dev) { struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); @@ -408,6 +456,8 @@ nix_eth_dev_ops_override(void) cnxk_eth_dev_ops.tx_queue_stop = cn10k_nix_tx_queue_stop; cnxk_eth_dev_ops.dev_start = cn10k_nix_dev_start; cnxk_eth_dev_ops.dev_ptypes_set = cn10k_nix_ptypes_set; + cnxk_eth_dev_ops.timesync_enable = cn10k_nix_timesync_enable; + cnxk_eth_dev_ops.timesync_disable = cn10k_nix_timesync_disable; } static void diff --git a/drivers/net/cnxk/cn9k_ethdev.c b/drivers/net/cnxk/cn9k_ethdev.c index 0d63604..994fdb7 100644 --- a/drivers/net/cnxk/cn9k_ethdev.c +++ b/drivers/net/cnxk/cn9k_ethdev.c @@ -371,6 +371,54 @@ cn9k_nix_ptp_info_update_cb(struct roc_nix *nix, bool ptp_en) } static int +cn9k_nix_timesync_enable(struct rte_eth_dev *eth_dev) +{ + struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); + int i, rc; + + rc = cnxk_nix_timesync_enable(eth_dev); + if (rc) + return rc; + + dev->rx_offload_flags |= NIX_RX_OFFLOAD_TSTAMP_F; + dev->tx_offload_flags |= NIX_TX_OFFLOAD_TSTAMP_F; + + for (i = 0; i < eth_dev->data->nb_tx_queues; i++) + nix_form_default_desc(dev, eth_dev->data->tx_queues[i], i); + + /* Setting up the rx[tx]_offload_flags due to change + * in rx[tx]_offloads. + */ + cn9k_eth_set_rx_function(eth_dev); + cn9k_eth_set_tx_function(eth_dev); + return 0; +} + +static int +cn9k_nix_timesync_disable(struct rte_eth_dev *eth_dev) +{ + struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); + int i, rc; + + rc = cnxk_nix_timesync_disable(eth_dev); + if (rc) + return rc; + + dev->rx_offload_flags &= ~NIX_RX_OFFLOAD_TSTAMP_F; + dev->tx_offload_flags &= ~NIX_TX_OFFLOAD_TSTAMP_F; + + for (i = 0; i < eth_dev->data->nb_tx_queues; i++) + nix_form_default_desc(dev, eth_dev->data->tx_queues[i], i); + + /* Setting up the rx[tx]_offload_flags due to change + * in rx[tx]_offloads. + */ + cn9k_eth_set_rx_function(eth_dev); + cn9k_eth_set_tx_function(eth_dev); + return 0; +} + +static int cn9k_nix_dev_start(struct rte_eth_dev *eth_dev) { struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); @@ -416,6 +464,8 @@ nix_eth_dev_ops_override(void) cnxk_eth_dev_ops.tx_queue_stop = cn9k_nix_tx_queue_stop; cnxk_eth_dev_ops.dev_start = cn9k_nix_dev_start; cnxk_eth_dev_ops.dev_ptypes_set = cn9k_nix_ptypes_set; + cnxk_eth_dev_ops.timesync_enable = cn9k_nix_timesync_enable; + cnxk_eth_dev_ops.timesync_disable = cn9k_nix_timesync_disable; } static void -- 2.8.4