From: Kai Ji <kai.ji@intel.com>
To: dev@dpdk.org
Cc: roy.fan.zhang@intel.com, Kai Ji <kai.ji@intel.com>,
pablo.de.lara.guarch@intel.com
Subject: [dpdk-dev] [dpdk-dev v1] crypto/aesni_gcm: fix performance issue
Date: Tue, 29 Jun 2021 13:36:02 +0100 [thread overview]
Message-ID: <20210629123602.27702-1-kai.ji@intel.com> (raw)
This patch fixes the aesni_gcm performance issue on systems with AVX512
CPU flag presented but with VAES CPU flag missing, such as Skylake.
Fixes: 81fe96a0cece ("crypto/aesni_gcm: use architecture independent API")
Cc: pablo.de.lara.guarch@intel.com
Signed-off-by: Kai Ji <kai.ji@intel.com>
---
drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
index bc87e44a9d..f8dea484b4 100644
--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
@@ -842,8 +842,14 @@ aesni_gcm_create(const char *name,
init_mb_mgr_avx2(mb_mgr);
break;
case RTE_AESNI_GCM_AVX512:
- dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX512;
- init_mb_mgr_avx512(mb_mgr);
+ if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_VAES)) {
+ dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX512;
+ init_mb_mgr_avx512(mb_mgr);
+ } else {
+ dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;
+ init_mb_mgr_avx2(mb_mgr);
+ vector_mode = RTE_AESNI_GCM_AVX2;
+ }
break;
default:
AESNI_GCM_LOG(ERR, "Unsupported vector mode %u\n", vector_mode);
--
2.17.1
next reply other threads:[~2021-06-29 12:36 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-29 12:36 Kai Ji [this message]
2021-06-29 15:19 ` [dpdk-dev] [dpdk-dev v2] " Kai Ji
2021-06-29 15:25 ` Zhang, Roy Fan
2021-07-07 13:36 ` Akhil Goyal
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