From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 79671A0A0C; Tue, 29 Jun 2021 15:55:42 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F3DD0411C5; Tue, 29 Jun 2021 15:55:41 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id E2A3240E01 for ; Tue, 29 Jun 2021 15:55:38 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10029"; a="207969158" X-IronPort-AV: E=Sophos;i="5.83,309,1616482800"; d="scan'208";a="207969158" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jun 2021 06:55:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,309,1616482800"; d="scan'208";a="447045499" Received: from npg-dpdk-haiyue-1.sh.intel.com ([10.67.118.197]) by orsmga007.jf.intel.com with ESMTP; 29 Jun 2021 06:55:36 -0700 From: Haiyue Wang To: dev@dpdk.org Cc: david.marchand@redhat.com, Haiyue Wang , Qiming Yang , Qi Zhang Date: Tue, 29 Jun 2021 21:33:32 +0800 Message-Id: <20210629133332.226897-1-haiyue.wang@intel.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v1] net/ice: enable to set HW debug mask X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The HW debug mask is always zero, so user can't enable the related debug function like ICE_DBG_XXX etc. Add the devarg 'hw_debug_mask' to set the function like for ICE_DBG_NVM: -a 0000:88:00.0,hw_debug_mask=0x80 --log-level=pmd.net.ice.driver:8 Signed-off-by: Haiyue Wang --- drivers/net/ice/ice_ethdev.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 09e38590e5..5a18663430 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -26,11 +26,13 @@ #define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support" #define ICE_PIPELINE_MODE_SUPPORT_ARG "pipeline-mode-support" #define ICE_PROTO_XTR_ARG "proto_xtr" +#define ICE_HW_DEBUG_MASK_ARG "hw_debug_mask" static const char * const ice_valid_args[] = { ICE_SAFE_MODE_SUPPORT_ARG, ICE_PIPELINE_MODE_SUPPORT_ARG, ICE_PROTO_XTR_ARG, + ICE_HW_DEBUG_MASK_ARG, NULL }; @@ -1836,6 +1838,25 @@ parse_bool(const char *key, const char *value, void *args) return 0; } +static int +parse_u64(const char *key, const char *value, void *args) +{ + u64 *num = (u64 *)args; + u64 tmp; + + errno = 0; + tmp = strtoull(value, NULL, 16); + if (errno) { + PMD_DRV_LOG(WARNING, "%s: \"%s\" is not a valid u64", + key, value); + return -1; + } + + *num = tmp; + + return 0; +} + static int ice_parse_devargs(struct rte_eth_dev *dev) { struct ice_adapter *ad = @@ -1872,6 +1893,11 @@ static int ice_parse_devargs(struct rte_eth_dev *dev) if (ret) goto bail; + ret = rte_kvargs_process(kvlist, ICE_HW_DEBUG_MASK_ARG, + &parse_u64, &ad->hw.debug_mask); + if (ret) + goto bail; + bail: rte_kvargs_free(kvlist); return ret; @@ -5306,6 +5332,7 @@ RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd); RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map); RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic | vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_ice, + ICE_HW_DEBUG_MASK_ARG "=0xXXX" ICE_PROTO_XTR_ARG "=[queue:]" ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>" ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>"); -- 2.32.0