From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1C524A0A0C; Thu, 1 Jul 2021 15:26:56 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9E43A412D4; Thu, 1 Jul 2021 15:26:55 +0200 (CEST) Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2055.outbound.protection.outlook.com [40.107.243.55]) by mails.dpdk.org (Postfix) with ESMTP id ED4CC4067C for ; Thu, 1 Jul 2021 15:26:54 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=GFGEsysqh0wolbZVAXtS4LRsbFK5n+UbAW5kDMx7ScifkE5ZChTbcEosNEJWW1PHJqHS0/mdrYfnrdJPQncA9PliLc835cX8FqOdFh0PaSxDcqx9mP9t2pXvOXbri98GrisX9U99VRbAsxRIubMvlAhFB2r0icyIM9A/OKS/PPBsV8xSxW1JVScSOjJF64BpiVkFXC9BgNtVd+3qB7omRycD97F82VI8O3KhAbsL9QK2oFfv9AdxteoVo2DZfIzfLKUlzNSwohBmg6ZTZaXGYIS3k4Qo9w6HW0FUwPEVbIZLkJGVG4v192uq3ib+UjHdjmI2Ufw7F/EnTFHPztbQjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=RF0Mu6hjlBUZzB6M8cZjM4Gt8P2ThJOWMDk7TwXbTJo=; b=CrMhfTOl8WGVD4D+QKgmoweKBrISZZZPMp0Fiy0e0Io7p5fd4cFwXzBTi02QIxsIcl6yNNb8guKcID5yVIjmH4OOE3RskNCuQeofrBnZaDXWY/ARMDrVhyDku4sX4YqRrsnDbS/MixoZ75zS2vY0urdCxpyEdAGaBIRUcM4JkkSxG2KfTI8OeXZgcle1h7DQ1JPp4OduOeDeN+f7kkVYhwaq0k2iCF/jvji9bJA4VZltDXb3IU/PsCeJ9BgHmO4NBmdHunjgXPNvazttAZ84ilIcta8701KOFVT2/9md4uvpwrUfpdDRlNQP4mSqwhomkm6PBhtVufm2x4tVJ3f+0Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.112.34) smtp.rcpttodomain=marvell.com smtp.mailfrom=nvidia.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=RF0Mu6hjlBUZzB6M8cZjM4Gt8P2ThJOWMDk7TwXbTJo=; b=O+EgHPRN/sw64gJQOMOlZG+htNBjxPXUXLXkTBYWufU1IDcwHgFAxufkpChY74ir5AO6CGHtZaL7Cm+4LyLvj1/PEPruDkUfBximbjg00ANh7e0+fBZv/fuKwW5O2yapKOgocSyc0yHGDqSUACfCzjU5q/WIH8xzbmGoM9KEV1j7Yc6ql0nfyXpaUS0A1eTW/WSQ049dS9WOUoEiIEAkOm8kqtMys0DGCh5IkCKfi5s62m7qeNppcrM6UUZ+IxNyXJCKw+W5EhH7QrLfihoPPsqnnYF2MP4oMmLVFANQvivoijs8P9NB/iIPHjf0umVnkeIFnpMXtXCXYdV+fAVBKA== Received: from BN8PR12CA0028.namprd12.prod.outlook.com (2603:10b6:408:60::41) by DM6PR12MB4893.namprd12.prod.outlook.com (2603:10b6:5:1bd::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4264.18; Thu, 1 Jul 2021 13:26:53 +0000 Received: from BN8NAM11FT042.eop-nam11.prod.protection.outlook.com (2603:10b6:408:60:cafe::30) by BN8PR12CA0028.outlook.office365.com (2603:10b6:408:60::41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4287.22 via Frontend Transport; Thu, 1 Jul 2021 13:26:53 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34) smtp.mailfrom=nvidia.com; marvell.com; dkim=none (message not signed) header.d=none;marvell.com; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT042.mail.protection.outlook.com (10.13.177.85) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4287.22 via Frontend Transport; Thu, 1 Jul 2021 13:26:52 +0000 Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 1 Jul 2021 13:26:50 +0000 From: Shiri Kuzin To: CC: , , Date: Thu, 1 Jul 2021 16:25:54 +0300 Message-ID: <20210701132609.53727-1-shirik@nvidia.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210509160507.224644-1-matan@nvidia.com> References: <20210509160507.224644-1-matan@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 5a40d0b7-06c2-40f0-bc6d-08d93c93e38c X-MS-TrafficTypeDiagnostic: DM6PR12MB4893: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:923; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: erZCR9C3CuLG5OyNuHN0NAE3duidQfftn5zOGoMv7NO/WAibvYVyBAWvbsIlTE4C6c34zUJzo70z1ngQuNTbIq/5Lp9MsfUTVRJb/0/hFkzwqNEdlpi4sz1k2nmwbMUfx1E+rzq40knk8FoUw4LV1bTYFuiBgZH8GO6GmOYLpZVWiNL8Qbd2CqOoxAayz3161JaLTM3NU2qfjZM3YhRu+1cbcojdJ7ooY/aJl40U5loz7M2AlrW0zu47yobDYIIxEv/pDXE6ccgqKSBP/RqkB/BTYXA/Gux4PxyFF2aKSoYzvGYwLlwmEG000nl8O+vZDTDObWS9bJ7AnqC0NYoC3tVKHNpYLF/+Y9o6CUH06K5eAGyzpJOdpjiP2fKHrRh3QzeSh8vFVUxDEhDhlfXXUDPtJE4TEufgcYclEkqQEkMMLlC2Qn1ziZM4n0PRN45dbnq2+kfhKfpDSnmLMf0tiBNg/qR95cI0si8ysT3uwqnV8aHK5Zc8Y+56sE1eaV2UzaYjOiQCjpXUP7Sfb3ZXi7b3yJ7MvG/kvbaTk4hyxvAuOyb416+4z4lFf0Q7B81GaqVjLmpN/G7SvLfs9AEu82Zq9eXAwfZ4+3ayF/qURkV7MElH00xvDxyd6T+p1pNFXiAffbniz85eLnXgazOgP3mPmXN7jmEqwgbL1SZ6Evlqpq+qYzCDXCFfzeZ1egtFR2KnqEbwSm9YLHiEJTqZTQ== X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(346002)(376002)(39860400002)(396003)(136003)(46966006)(36840700001)(316002)(2906002)(336012)(26005)(83380400001)(82740400003)(8676002)(8936002)(36860700001)(426003)(4743002)(186003)(55016002)(7636003)(16526019)(82310400003)(54906003)(70586007)(107886003)(2616005)(47076005)(4326008)(1076003)(6286002)(70206006)(6916009)(356005)(7696005)(5660300002)(36756003)(86362001)(478600001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2021 13:26:52.3377 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5a40d0b7-06c2-40f0-bc6d-08d93c93e38c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT042.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4893 Subject: [dpdk-dev] [PATCH v5 00/15] drivers: introduce mlx5 crypto PMD X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add a new PMD for Nvidia devices- crypto PMD. The crypto PMD will be supported on Nvidia ConnectX6. The crypto PMD will add the support of encryption and decryption using the AES-XTS symmetric algorithm. The crypto PMD requires rdma-core and uses mlx5 DevX. v2: Add data-path part. v3: Rebase. v4: - Rebase + Address the following Akhil comments: - Set HW feature flag in the capability patch. - Fix mp object release in session clear. - Some spelling and word missing in doc. - Squash data-unit adjustment to the session operations commit. - Wording: device argument -> devarg. v5: - Add mlx5 crypto tests into test library. - Update documentation according to Akhil comments. - Fix memory region management. - Fix multi segment case in data-path code. - Split documentation to the correct commits according to Akhil comments. - Rebase to new version. - Change license to Nvidia license. Shiri Kuzin (10): drivers: introduce mlx5 crypto PMD crypto/mlx5: add DEK object management crypto/mlx5: add session operations crypto/mlx5: add basic operations crypto/mlx5: add queue pairs operations crypto/mlx5: add dev stop and start operations crypto/mlx5: add memory region management crypto/mlx5: create login object using DevX test/crypto: add mlx5 crypto driver test/crypto: add mlx5 multi segment tests Suanming Mou (5): crypto/mlx5: add keytag devarg crypto/mlx5: add maximum segments devarg crypto/mlx5: add WQE set initialization crypto/mlx5: add enqueue and dequeue operations crypto/mlx5: add statistic get and reset operations MAINTAINERS | 4 + app/test/meson.build | 1 + app/test/test_cryptodev.c | 611 ++++- app/test/test_cryptodev.h | 3 +- app/test/test_cryptodev_mlx5_test_vectors.h | 2499 +++++++++++++++++++ doc/guides/cryptodevs/features/mlx5.ini | 37 + doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/mlx5.rst | 150 ++ doc/guides/rel_notes/release_21_08.rst | 5 + drivers/common/mlx5/mlx5_common.h | 1 + drivers/common/mlx5/mlx5_common_pci.c | 14 + drivers/common/mlx5/mlx5_common_pci.h | 21 +- drivers/crypto/meson.build | 1 + drivers/crypto/mlx5/meson.build | 27 + drivers/crypto/mlx5/mlx5_crypto.c | 1177 +++++++++ drivers/crypto/mlx5/mlx5_crypto.h | 91 + drivers/crypto/mlx5/mlx5_crypto_dek.c | 136 + drivers/crypto/mlx5/mlx5_crypto_utils.h | 19 + drivers/crypto/mlx5/version.map | 3 + 19 files changed, 4774 insertions(+), 27 deletions(-) create mode 100644 app/test/test_cryptodev_mlx5_test_vectors.h create mode 100644 doc/guides/cryptodevs/features/mlx5.ini create mode 100644 doc/guides/cryptodevs/mlx5.rst create mode 100644 drivers/crypto/mlx5/meson.build create mode 100644 drivers/crypto/mlx5/mlx5_crypto.c create mode 100644 drivers/crypto/mlx5/mlx5_crypto.h create mode 100644 drivers/crypto/mlx5/mlx5_crypto_dek.c create mode 100644 drivers/crypto/mlx5/mlx5_crypto_utils.h create mode 100644 drivers/crypto/mlx5/version.map -- 2.27.0