[dpdk-dev] [PATCH v3 13/15] vdpa/mlx5: support SubFunction

[Xueming Li <xuemingl@nvidia.com>]

From: Thomas Monjalon <thomas@monjalon.net>

Supports SubFunction on auxiliary bus. SF probe devargs:
  auxiliary:mlx5_core.sf.<id>,class=vdpa

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
---
 doc/guides/vdpadevs/mlx5.rst  | 10 ++++++++++
 drivers/vdpa/mlx5/mlx5_vdpa.c |  8 ++++++--
 2 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/doc/guides/vdpadevs/mlx5.rst b/doc/guides/vdpadevs/mlx5.rst
index 9b2f9f12c7..e81dbd0004 100644
--- a/doc/guides/vdpadevs/mlx5.rst
+++ b/doc/guides/vdpadevs/mlx5.rst
@@ -162,6 +162,16 @@ Driver options
 
   - 0, HW default.
 
+Devargs example
+^^^^^^^^^^^^^^^
+
+- PCI devargs:
+
+  -a 0000:03:00.2,class=vdpa
+
+- Auxiliary devargs:
+
+  -a auxiliary:mlx5_core.sf.2,class=vdpa
 
 Error handling
 ^^^^^^^^^^^^^^
diff --git a/drivers/vdpa/mlx5/mlx5_vdpa.c b/drivers/vdpa/mlx5/mlx5_vdpa.c
index 9c9a552ba0..6d17d7a6f3 100644
--- a/drivers/vdpa/mlx5/mlx5_vdpa.c
+++ b/drivers/vdpa/mlx5/mlx5_vdpa.c
@@ -553,9 +553,13 @@ mlx5_vdpa_sys_roce_disable(const char *addr)
 static int
 mlx5_vdpa_roce_disable(struct rte_device *dev)
 {
+	char pci_addr[PCI_PRI_STR_SIZE] = { 0 };
+
+	if (mlx5_dev_to_pci_str(dev, pci_addr, sizeof(pci_addr)) < 0)
+		return -rte_errno;
 	/* Firstly try to disable ROCE by Netlink and fallback to sysfs. */
-	if (mlx5_vdpa_nl_roce_disable(dev->name) != 0 &&
-	    mlx5_vdpa_sys_roce_disable(dev->name) != 0)
+	if (mlx5_vdpa_nl_roce_disable(pci_addr) != 0 &&
+	    mlx5_vdpa_sys_roce_disable(pci_addr) != 0)
 		return -rte_errno;
 	return 0;
 }
-- 
2.25.1